HP Caliper User Guide Release 5.5 (5900-2351, August 2012)

Table 27 Information in icache Measurement Reports (continued)
DescriptionColumn
The column contains one of these:Line |
Slot |
Col,Offset
A source-code line number for rows showing statements
An instruction slot number for rows showing instructions not on a bundle boundary
A source-code column number followed by an offset from the beginning address of a function
for rows showing instructions on a bundle boundary
Column and line numbers are preceded by “~” when they are approximate due to optimization.
The column contains either a source statement, preceded by “>”, or a disassembled instruction.
Statements that are out of order due to optimization are preceded by “*>”.
>Statement |
Instruction
Function Details
A cache line is the smallest unit of data that is transferred at one time between main memory and
the instruction cache. On Itanium 2 systems, cache lines are 64 bytes (12 instructions). Cache lines
are the finest level of granularity available in icache measurement reports.
These reports show data associated with a cache line on the same row as the first instruction of
the cache line. Each set of instructions that make up a cache line are preceded and followed by
a row of dashes (“- - - -”). The cache lines shown might not be contiguous.
Non-contiguous cache lines are separated by a row of tildes (“~ ~ ~ ~”).
How Instruction Cache Metrics Are Obtained
HP Caliper obtains instruction cache metrics from the processor's performance monitoring unit
(PMU).
Exact counts are obtained from the PMU's set of performance monitor configuration
(PMC)/performance monitor data (PMD) register pairs. Sampled instruction cache metrics are
obtained from the PMU's instruction event address register (I-EAR). Both sets of metrics focus on
the L1 cache.
HP Caliper takes samples every Nth instruction cache miss, where N is defined in the icache
measurement configuration file in the HP Caliper home directory config/) subdirectory. At each
sample point, HP Caliper records both the cache line that resulted in an instruction cache miss and
the latency, number of clock cycles, incurred by the miss. You can override the value in the
measurement configuration file by using the -s option.
HP Caliper attributes samples for a given cache line to the function associated with the start address
of the cache line. Because cache lines can cross function boundaries, data attributed to functions
will not always be accurate. However, only cache-line data at the boundaries of the function are
potentially misattributed.
More frequent sampling increases HP Caliper's perturbation of your application. In the extreme
case of taking one sample for each cache miss event, the kernel will trap on every event, making
the resulting data of limited, if any, value.
itlb Measurement Report Description
With the itlb measurement, produced by the itlb measurement configuration file, HP Caliper
measures and reports two levels of information:
Exact counts of instruction translation lookaside buffer (TLB) metrics summed across the entire
run of an application
Sampled instruction TLB metrics that are associated with particular locations in the application
The report shows masured data by thread, load module, function, statement, and cache line.
Command-line options allow you to control the amount of data reported, how the data is sorted,
and the number of statements and instructions reported for each sampled program location.
itlb Measurement Report Description 217