HP Caliper User Guide Release 5.5 (5900-2351, August 2012)

executable Specifies that “matching” processes should have their data combined when

possible.

This is the default for all HP Caliper reports and for all caliper report,

caliper merge, and caliper diff commands.

module Specifies that “matching” modules should have their data combined. This produces

a module-centric report. In a module-centric report, there is no data about

individual processes in the collection runs. Instead, all matching modules with

data that can be merged are grouped together, across processes.

The following HP Caliper measurements cannot be combined across processes

or modules:

• cgprof(HP-UX only)

• cpu(HP-UX only)

• pmu_trace

• scgprof

Collections with the above measurements will always be processed as if

--group-by none were specified.

See “Module-Centric Reports” (page 108).

none Specifies that data from matching processes or modules should not have their

data combined. This is used only for the caliper and caliper report

commands.

See “Creating Reports from Multiple Databases” (page 115).

--help

See “-H or --help” (p. 49).

--hotpaths

Specifies whether or not the hot call paths section should appear in callgraph measurement reports.

The default value is True. This option is used only with the cgprof, and scgprof reports.

--ibrp

--ibrp=IBRP_INDEX,PLM,ADDR_MATCH,ADDR_MASK

Specifies the bits to program the PMU's instruction address range matching registers. Forces event

monitoring to be constrained by instruction addresses ranges.

IBRP_INDEX can be 0, 1, 2 or 3. It identifies one of the four Instruction Breakpoint Register

pairs (IBRPs) used to specify the desired address range.

PLM specifies the privilege level setting. The privilege levels available are: "user",

"kernel", and "all".

ADDR_MATCH is the 64-bit address to match.

ADDR_MASK is the 56-bit address mask to apply before matching the ADDR_MATCH bits. The

HP Caliper option --_debug-pmu-settings will dump the exact bits

programmed into the PMUs registers. This is helpful in verifying the bits

programmed into the opcode matching and address matching registers.

For more information about opcode matching, instruction address range and

data address range matching, refer to the following Intel documentation: Dual-Core

Update to the Intel Itanium 2 Processor Reference Manual for Software

Development and Optimization, Document Number 308065-001. http://

62 HP Caliper Options