MPE/iX Shell and Utilities Reference Manual, Vol 1

make(1) MPE/iX Shell and Utilities make(1)

up-to-date version. In this case, the compiled program ﬁle is the target and the corresponding

source code ﬁles are prerequisites (that is, the ﬁles on which a target is dependent).

make updates all targets that are speciﬁed on the command line. If you do not specify any

target, make updates the targets in the ﬁrst rule of the makeﬁle. A target is out-of-date if it is

older than any of its prerequisites (based on modiﬁcation times) or if it does not exist. To

update a target, make ﬁrst recursively ensures that all the target’s prerequisites are up-to-date,

processing them in the order in which they appear in the rule. If the target itself is out-of-date,

make then executes the recipe associated with the target. If the target has no associated rec-

ipe, make considers it up-to-date.

make also supports another form of targets known as special targets described in the Special

Targets section of this man page.

Makeﬁles

A makeﬁle is a text ﬁle which describes the dependencies between various ﬁles. A makeﬁle

normally contains a list of targets and identiﬁes the prerequisites on which each depends. It

also contains a series of instructions, called recipes which describe the actions to be taken if a

given target is out-of-date with its prerequisites.

By default, if you do not specify the –f option, make looks for a ﬁle in your current directory

named makefile.Ifmake does not ﬁnd this ﬁle, it searches your current directory for a ﬁle

named Makefile.Ifmake ﬁnds either ﬁle, it is used as your makeﬁle.

You can change the default makeﬁles with the .MAKEFILES special target (see the Special

Targets section of this man page).

Macro Deﬁnitions

Macro deﬁnitions may take several forms.

macro = string

is the usual form. If string contains macro references, make does not expand them when the

macro is deﬁned, but when the macro is actually used.

macro := string

expands macros inside string before creating macro.

macro += string

adds string to the previous value of macro.

You can use any amount of white space on both sides of macro operators. make deﬁnes the

name macro to have the value string and replaces it with that value whenever it is used as

$(macro) or ${macro} within the makeﬁle. It is possible to specify a $(macro_name) or

${macro_name} macro expansion where macro_name contains more $(...) or ${...}

macro expansions itself.

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