HP C Programmer's Guide (92434-90009)

Chapter 4 93
Optimizing HP C Programs
Level 2 Optimization Modules
X[R6] = R11
Save result of operations on current row.
} while (R1 <= 100);
End loop.
R9=R5+R2;
Perform addition on last row:X[i+2] = n + 4
X[R6] = R9;
Save result of operations on last row.
This transformation stores intermediate results of the division instructions in unique
registers (noted as
n and m ). These registers are not referenced until several instructions
after the division operations. This decreases the possibility that the long latency period of
the division instructions will stall the instruction pipeline and cause processing delays.
Prerequisites of Pipelining
Software pipelining is attempted on a loop that meets the following criteria:
• It is the innermost loop.
• There are no branches or function calls within the loop.
• The loop is of moderate size.
This optimization produces slightly larger program files and increases compile time. It is
most beneficial in programs containing loops that are executed a large number of times.
This optimization is not recommended for loops that are executed only a small number of
times.
Use the +Onopipeline option with the +O2, +O3, or +O4 option to suppress software
pipelining if program size is more important than execution speed. This will perform level
two optimization, but disable software pipelining.
Register Reassociation
Array references often require one or more instructions to compute the virtual memory
address of the array element specified by the subscript expression. The register
reassociation optimization implemented in the PA-RISC compilers tries to reduce the cost
of computing the virtual memory address expression for array references found in loops.
Within loops, the virtual memory address expression can be rearranged and separated into
a loop varying term and a loop invariant term. Loop varying terms are those items whose
values may change from one iteration of the loop to another. Loop invariant terms are
those items whose values are constant throughout all iterations of the loop. The loop
varying term corresponds to the difference in the virtual memory address associated
with a particular array reference from one iteration of the loop to the next.
The register reassociation optimization dedicates a register to track the value of the
virtual memory address expression for one or more array references in a loop and updates
the register appropriately in each iteration of a loop.