Compaq StorageWorks HSG60 ACS Solution Software V8.6 for Compaq Tru64 UNIX Installation and Configuration Guide

Glossary–19
ULP process A function executing within a Fibre Channel node which conforms to the
Upper Layer Protocol (ULP) requirements when interacting with other ULP
processes.
Ultra SCSI A Fast-20 SCSI bus. See also Wide Ultra SCSI.
unit A container made accessible to a host. A unit may be created from a single
disk drive or tape drive. A unit may also be created from a more complex
container such as a RAIDset. The controller supports a maximum of eight
units on each target. See also target and target ID number.
unwritten cached
data
Sometimes called unflushed data. See dirty data.
UPS Uninterruptible power supply. A battery-powered power supply guaranteed to
provide power to an electrical device in the event of an unexpected
interruption to the primary power supply. Uninterruptible power supplies are
usually rated by the amount of voltage supplied and the length of time the
voltage is supplied.
VHDCI Very high-density-cable interface. A 68-pin interface. Required for
Ultra-SCSI connections.
virtual terminal A software path from an operator terminal on the host to the controller's CLI
interface, sometimes called a host console. The path can be established via the
host port on the controller or via the maintenance port through an intermediary
host.
VTDPY An abbreviation for Virtual Terminal Display Utility.
warm swap A device replacement method that allows the complete system to remain
online during device removal or insertion. The system bus may be halted, or
quiesced, for a brief period of time during the warm-swap procedure.
Wide Ultra SCSI Fast/20 on a Wide SCSI bus.
Worldwide name A unique 64-bit number assigned to a subsystem by the Institute of Electrical
and Electronics Engineers (IEEE) and set by Compaq manufacturing prior to
shipping. This name is referred to as the node ID within the CLI.
write-back caching A cache management method used to decrease the subsystem response time to
write requests by allowing the controller to declare the write operation
“complete” as soon as the data reaches its cache memory. The controller
performs the slower operation of writing the data to the disk drives at a later
time.