Datasheet

IFX24401
Pin Configuration
Data Sheet 5 Rev. 1.02, 2009-12-10
Figure 3 Pin Configuration PG-SSOP-14 (top view)
3.2 Pin Definitions and Functions (PG-SSOP-14 )
Pin Symbol Function
1,2,3,5,7 N.C. No Connect
May be open or connected to GND
4GNDGround
6ENEnable Input
Low signal level disables the regulator. Pull-down resistor is integrated.
8,10,11,1
2,14
N.C. No Connect
May be open or connected to GND
9Q Output
Place capacitor between Q pin and GND. Capacitor placement should be close to pin.
Refer to capacitance and ESR requirements in “Functional Range” on Page 6
13 I Input
Connect ceramic capcitor between I and GND
Pad Exposed Pad
Connect to board GND and heatsink
1&
1&
4
1&
1&
1&
,
1&
1&
1&
1&
*1'
1&





3,1&21),*B662369*
(1