User's Manual

microNode Integration Specification Electrical Interface
On-Ramp Wireless, Inc. 13 014-0033-00 Rev. H
3.1.4 MRQ
The MRQ (Master Request) is the Host’s normal way of waking the microNode to initiate SPI
communications. Logic “High” forces the microNode awake.
3.1.5 SRDY
SRDY (Slave Ready) is an indication from the microNode that it has fully booted its internal
Firmware image, initialized its Hardware and Interfaces, and is ready for communication
(arbitration) with the Host. Logic “High” indicates the microNode is ready for communications.
3.1.6 SRQ
The SRQ (Slave Request) signal is an indication from the microNode that it wants the Host’s
attention. When SRQ is asserted “High,” the Host must read the Status registers of microNode. If
SRQ is “High,” SRDY will also be “High.”
3.1.7 USTATUS
USTATUS is currently undefined. In software it can be either an Input or Output. Currently it is
configured as an input. The Host should not use this signal.
3.1.8 SPI System
The SPI system is the generic term used for all SPI signals (MOSI, MISO, CS, SCLK) to be set up for
SPI communications to occur between Host and microNode.
The microNode SPI is the Slave in the Master/Slave communications and is defined in section
4.2: SPI Mode and Timing.
3.1.9 ANT_SEL
The Antenna Select (microNode output) signal is used to control a RF T/R signal to allow
Antenna Diversity. This is more fully defined in Chapter 8: Antenna Diversity.
3.1.10 UART_SIN
This UART_SIN is a microNode UART input signal. It is reserved for future use and should not be
used by the Host. Leave unconnected.
3.1.11 UART_SOUT
The UART_SOUT is a UART output signal that is currently reserved. The Host should not use this
pin.