User's Manual
Table Of Contents
- Contents
- 1 Overview
- 2 DC and AC Characteristics
- 3 Electrical Interface
- 4 SPI Interface and Sequences
- 5 Power States
- 6 Messaging Protocol
- 7 microNode Provisioning
- 8 Antenna Diversity
- 9 Regulatory Considerations
- 10 Manufacturing Considerations
- 11 Errata
- Appendix A Abbreviations and Terms
- Appendix B PCB Land Pattern and Vias
- Appendix C REACH AND RoHS Compliance
- Appendix D On-Ramp Wireless RMA Process
- Appendix E microNode Mechanical Drawing
microNode Integration Specification SPI Interface and Sequences
On-Ramp Wireless, Inc. 22 014-0033-00 Rev. H
4.7 Host MRQ Release/microNode Allowed to Sleep Sequence
If the Host determines there are no more messages or SPI transactions required, it nominally de-
asserts the MRQ to allow the microNode to fall back to Deep Sleep (lowest power mode). The
figure below shows how this is sequenced by the Host/microNode. A small delay in de-asserting
SRDY is enforced to prevent quick toggling (waking) of the microNode.
NOTE: The timing shown in the figure is not to scale.
t
0
t
1
t
2
SRDY
SPI
System
MRQ
Hi-Z
10 ms3 ms
Figure 13. Host MRQ Release/microNode Allowed to Sleep Sequence