User's Manual
Table Of Contents
- Contents
- 1 Overview
- 2 DC and AC Characteristics
- 3 Electrical Interface
- 4 SPI Interface and Sequences
- 5 Power States
- 6 Messaging Protocol
- 7 microNode Provisioning
- 8 Antenna Diversity
- 9 Regulatory Considerations
- 10 Manufacturing Considerations
- 11 Errata
- Appendix A Abbreviations and Terms
- Appendix B PCB Land Pattern and Vias
- Appendix C REACH AND RoHS Compliance
- Appendix D On-Ramp Wireless RMA Process
- Appendix E microNode Mechanical Drawing
microNode Integration Specification Messaging Protocol
On-Ramp Wireless, Inc. 29 014-0033-00 Rev. H
MRQ=1
Node
SRDY=1
Host
Slave
Request
Slave Ready
ArbREQ
ArbACK
ValREQ
ValACK
Arbitration
Request
Arbitration
Acknowledge
Validation
Acknowledge
Validation
Request
MMsgREQ+Size
MMsgACK+Size
M
H
d
r
R
E
Q
M
H
d
r
A
C
K
Master Message
Request
Master Message
Acknowledge
Master Header
Request
Master Header
Acknowledge
Payload
Transmit
Payload
Receive
SMsgREQ+Size
SMsgACK+Size
S
H
d
r
R
E
Q
S
H
d
r
A
C
K
Slave Message
Request
Slave Message
Acknowledge
Slave Header
Request
Slave Header
Acknowledge
Payload
Transmit
Payload
Receive
Repeat 6 steps above
PAYLOAD
SRQ=1
Slave
Request
Arbitration
Host-to- Node
Message
Transfer
Node-to-Host
Message
Transfer
wait
wait
wait
wait
wait
wait
wait
=
Turn-around Delay
MRQ=1
SRDY=1
MRQ=1
SRDY=1
wait
wait
PAYLOAD
Repeat
5
steps above
if needed
Figure 16. SPI Master and Slave Message Sequences
In each of the request/acknowledge command pairs shown, the top command is transmitted by
the Host (master) and the bottom command is transmitted by the Node (slave). The wait