User's Manual
Table Of Contents
- Contents
- 1 Overview
- 2 DC and AC Characteristics
- 3 Electrical Interface
- 4 SPI Interface and Sequences
- 5 Power States
- 6 Messaging Protocol
- 7 microNode Provisioning
- 8 Antenna Diversity
- 9 Regulatory Considerations
- 10 Manufacturing Considerations
- 11 Errata
- Appendix A Abbreviations and Terms
- Appendix B PCB Land Pattern and Vias
- Appendix C REACH AND RoHS Compliance
- Appendix D On-Ramp Wireless RMA Process
- Appendix E microNode Mechanical Drawing
On-Ramp Wireless, Inc. 51 014-0033-00 Rev. H
Appendix B PCB Land Pattern and Vias
KEEP OUT AREA
(See the note below.)
KEEP OUT AREA NOTE:
There are exposed vias on the bottom of the microNode to facilitate reflow soldering of
components with thermal paddles. Traces and vias on the microNode host board should be
minimized under the microNode. To avoid potential shorts between the microNode and the
host board, the host board should not have signal vias with exposed copper that can come into
contact with the un-tented vias on the microNode.
Figure 24. microNode PCB Land Pattern
Figure 25. microNode/Host Vias