® Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Design Guidelines July 2003 Order Number 298644-003
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines THIS DOCUMENT AND RELATED MATERIALS AND INFORMATION ARE PROVIDED "AS IS" WITH NO WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION, OR SAMPLE.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines Contents 1 Scope ....................................................................................................................................... 5 2 Electrical Specifications......................................................................................................... 8 3 2.1 Output Requirements ................................................................................................... 8 2.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines Guideline Definitions This document defines DC-to-DC converters to meet the power requirements of computer systems using Intel® microprocessors. VRD requirements will vary according to the needs of different computer systems and processors that a specific VRD is expected to support. The “VRD” designation refers to an embedded voltage regulator on a system board. Please refer to the VRM 9.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 1 Scope This document details the guidelines for developing a single embedded voltage regulator circuit (VRD) to supply the required current and voltage to the common power plane for two Intel® Xeon™ processors or Low Voltage Intel Xeon Processors on a dual-processor-capable system board. The parameters specified in this document are provided as guidelines only.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines Voltage Regulator Down Simplified Model Power Supply LCABLE* psu LCABLE* RVR S1 Intel® Xeon™ Processor Board Model Equivalent model LVR LMB1* LMB2 RBULK RMB1* RHF1 ESLINPUT LBULK LHF1 LHF2 CINPUT CBULK CHF1 CHF2 RCABLE* ESRINPUT S2 LMB1* RCABLE* RMB2 RHF2 LMB2 RMB1* RMB2 Remote sense connection points Intel Xeon Processor Equivalent model LMB2 RMB2 RHF2 LHF2 CHF2 LMB2 RMB2 Figure 2 – Base VRD Electrical De
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 12V Driver A clks VID PWRGD OUTEN Controller Driver B Vcc Driver C Driver D Figure 3 – Simplified VRD Circuit Example 7
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 2 Electrical Specifications 2.1 Output Requirements 2.1.1 REQUIRED Voltage and Current The voltages and currents supplied by the VRD are shown in the following tables. Load-line specifications are specified at the processor socket pins. A five-bit voltage identification (VID) code described in Section 2.3.2 determines a reference VRD output voltage.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 2.1.4 Single or Dual Processor Operation Many OEMs require that a dual-processor VRD supplying a Intel Xeon processor’s or Low Voltage Intel Xeon processor’s common voltage plane operate with either one or two processors installed on the board: i.e., the design must meet the static and transient voltage characteristics of both the dual- and single-processor load lines.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 1.71 1.70 VVRD_MAX VVRD_MIN 1.69 Remote Sense Voltage 1.68 1.67 1.66 1.65 1.64 1.63 1.62 1.61 1.60 1.59 0 5 10 15 20 25 30 35 40 45 50 55 60 65 VRD Current, A Figure 4 – Single (UP) Intel® Xeon™ Processor Voltage Regulation Limits 1.71 1.70 1.69 VVRD_MAX VVRD_MIN Remote Sense Voltage 1.68 1.67 1.66 1.65 1.64 1.63 1.62 1.61 1.60 1.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 1.525 VRD_VMAX VRD_VMIN 1.505 Remote Sense Voltage 1.485 1.465 1.445 1.425 1.405 1.385 1.365 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 VRD Current (A) Figure 6- Single(UP) Intel® Xeon™ Processor with 512-KB L2 Cache Voltage Regulation Limits 1.525 VRD_VMAX VRD_VMIN 1.505 Remote Sense Voltage 1.485 1.465 1.445 1.425 1.405 1.385 1.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 1.310 1.300 V RD_V M A X Remore Sense Voltage 1.290 V RD_V M IN 1.280 1.270 1.260 1.250 1.240 1.230 1.220 0 10 20 30 40 50 VRD Current (A) Figure 8 – Single (UP) Low Voltage Intel® Xeon™ Processor Voltage Regulation Limits 1.310 Remote Sense Voltage 1.300 VRD_VM AX 1.290 VRD_VM IN 1.280 1.270 1.260 1.250 1.240 1.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines Table 2 and Table 3 show the minimum and maximum allowable deviation against VID voltages specified in 4 for all load changes except turn-on and turn-off.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines Table 3 – Low Voltage Intel® Xeon ™ Processor Voltage Deviations from VID UP Low Voltage Intel Xeon Processor Vcc DP Low Voltage Intel Xeon Processor Vcc Max Min Max Min 0 1.300 1.274 1.300 1.274 5 1.295 1.269 1.298 1.272 10 1.291 1.265 1.295 1.269 15 1.286 1.260 1.293 1.267 20 1.281 1.255 1.291 1.265 25 1.276 1.250 1.288 1.262 30 1.272 1.246 1.286 1.260 35 1.267 1.241 1.283 1.257 40 1.262 1.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 2.1.8 Converter Stability The VRD should be unconditionally stable under all output voltage ranges and current transients when developed against and incorporating the elements of the load model defined in Figure 2. Stability requirements include a Thermal Monitor operating condition in which the processor core clocks may periodically stop to reduce its average power dissipation in response to a hightemperature condition.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines ensure that the supply voltage on the system board does not go outside of regulation requirements during times of transient load on the VRD. 2.3 Control Inputs 2.3.1 REQUIRED Output Enable—(OUTEN) The VR should accept an open-collector, open-drain, open-switch-to-ground, low-voltage TTL or low-voltage CMOS signal to enable the output. The input should have a pull-up resistor between 1 kΩ and 10 kΩ to 3.3V.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines low-impedance (to ground) state whenever Vcc is outside of the required range below and be in the open state whenever Vcc is within its specified range, Section 2.1. On power up, the PWRGD signal must remain in the low-impedance state until the output voltage has stabilized within the required tolerance. 2.4.1 Power Good Threshold Voltages The minimum voltage at which PWRGD is asserted should be the minimum Vcc specified in Section 2.1.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 3.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines 2.6 Efficiency PROPOSED The efficiency of the VRD should be greater than 80% at maximum output current and across input voltage range. It should not dissipate more power under any load condition than it does at maximum output current and maximum input voltage. 2.7 Fault Protection PROPOSED These are features built into the VRD to prevent damage to itself or the circuits it powers. 2.7.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines encouraged to contact these companies and discuss applications of those circuit designs in their specific system board requirements. 3.1 Controller Tolerance To maximize VRD voltage tolerance over load and temperature conditions, Intel recommends the use of controllers with Vref tolerances of ≤ 0.5% over temperature. 3.2 Power Plane A single set of Vcc and Vss planes must deliver power to all processor sharing a system bus.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines Each of the phase drivers should be somewhat equally spaced from the socket. The bulk capacitors should be mounted between the phase drivers and the socket, as close as possible to the socket. If the phase drivers are separated substantially from each other, the bulk capacitors should be divided up among them. Figure 14 details one example of phase driver and bulk capacitor placement.
Dual Intel® Xeon™ Processor Voltage Regulator Down (VRD) Guidelines considerations. The main components requiring attention during the design process are the highand low-side MOSFETs and output inductor. A thermal analysis on a per phase basis will show the main contributors to the losses.
