Datasheet

88 Datasheet
Intel
®
Celeron
®
Processor up to 1.10 GHz
D39# D10 AGTL+ I/O
D40# C15 AGTL+ I/O
D41# D14 AGTL+ I/O
D42# D12 AGTL+ I/O
D43# A7 AGTL+ I/O
D44# A11 AGTL+ I/O
D45# C11 AGTL+ I/O
D46# A21 AGTL+ I/O
D47# A15 AGTL+ I/O
D48# A17 AGTL+ I/O
D49# C13 AGTL+ I/O
D50# C25 AGTL+ I/O
D51# A13 AGTL+ I/O
D52# D16 AGTL+ I/O
D53# A23 AGTL+ I/O
D54# C21 AGTL+ I/O
D55# C19 AGTL+ I/O
D56# C27 AGTL+ I/O
D57# A19 AGTL+ I/O
D58# C23 AGTL+ I/O
D59# C17 AGTL+ I/O
D60# A25 AGTL+ I/O
D61# A27 AGTL+ I/O
D62# E25 AGTL+ I/O
D63# F16 AGTL+ I/O
DBSY# AL27 AGTL+ I/O
DEFER# AN19 AGTL+ Input
DRDY# AN27 AGTL+ I/O
EDGCTRL AG1 Power/Other
FERR# AC35 CMOS Output
FLUSH# AE37 CMOS Input
HIT# AL25 AGTL+ I/O
HITM# AL23 AGTL+ I/O
IERR# AE35 CMOS Output
IGNNE# AG37 CMOS Input
INIT# AG33 CMOS Input
LINT0/INTR M36 CMOS Input
LINT1/NMI L37 CMOS Input
LOCK# AK20 AGTL+ I/O
PICCLK J33 APIC Clock Input
Table 50. PPGA Package Signal Listing
in Order by Signal Name
Pin Name
Pin
No. Signal Buffer Type
PICD0 J35 APIC I/O
PICD1 L35 APIC I/O
PLL1 W33 Power/Other
PLL2 U33 Power/Other
PRDY# A35 AGTL+ Output
PREQ# J37 CMOS Input
PWRGOOD AK26 CMOS Input
REQ0# AK18 AGTL+ I/O
REQ1# AH16 AGTL+ I/O
REQ2# AH18 AGTL+ I/O
REQ3# AL19 AGTL+ I/O
REQ4# AL17 AGTL+ I/O
Reserved AC1 Reserved for Future Use
Reserved AC37 Reserved for Future Use
Reserved AF4 Reserved for Future Use
Reserved AK16 Reserved for Future Use
Reserved AK24 Reserved for Future Use
Reserved AK30 Reserved for Future Use
Reserved AL11 Reserved for Future Use
Reserved AL13 Reserved for Future Use
Reserved AL21 Reserved for Future Use
Reserved AN11 Reserved for Future Use
Reserved AN13 Reserved for Future Use
Reserved AN15 Reserved for Future Use
Reserved AN21 Reserved for Future Use
Reserved AN23 Reserved for Future Use
Reserved B36 Reserved for Future Use
Reserved C29 Reserved for Future Use
Reserved C31 Reserved for Future Use
Reserved C33 Reserved for Future Use
Reserved E23 Reserved for Future Use
Reserved E29 Reserved for Future Use
Reserved E31 Reserved for Future Use
Reserved F10 Reserved for Future Use
Reserved G35 Reserved for Future Use
Reserved G37 Reserved for Future Use
Reserved L33 Reserved for Future Use
Reserved N33 Reserved for Future Use
Reserved N35 Reserved for Future Use
Reserved N37 Reserved for Future Use
Table 50. PPGA Package Signal Listing
in Order by Signal Name
Pin Name
Pin
No. Signal Buffer Type