Intel® Socket Test Technology Application Note For the LGA775 Socket Product Code JM8YKZLVA October 2006 Document Number: 307507-002
Introduction “INTEL PRODUCT” AS USED HEREIN IS DEFINED AS THE INTEL® SOCKET TEST TECHNOLOGY FOR THE LGA775 SOCKET, PRODUCT CODE JM8YKZLVA INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCT. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT.
Introduction Contents 1 Introduction.....................................................................................................................................7 1.1 1.2 Terminology ......................................................................................................................8 Reference Documents .....................................................................................................8 2 Theory ................................................................
Introduction Figures Figure 1 - Intel® Socket Test Technology for the LGA775 Socket - Product Code JM8YKZLVA (LGA775YP) .......................................................................................................7 Figure 2 - Intel® Socket Test Technology for the LGA775 Socket - Block Diagram Product Code JM8YKZLVA (LGA775YP)............................................................................10 Figure 3 - Typical Switch Pair Configuration...................................................
Introduction Revision History Revision Number -001 -002 Description Revision Date Initial Release.
Introduction 6 307507-002
Introduction 1 Introduction The Intel® Socket Test Technology for the LGA775 socket is a test chip that enables testing for the mechanical integrity and electrical continuity of both socket-to-board solder ball connectivity and socket-to-processor contact connectivity. Once inserted into the board’s LGA775 socket, the test chip works with either in-circuit testers (ICT) or manufacturing defect analyzers (MDA) that have access to all the socket nets through test fixture probes.
Introduction 1.1 Terminology Term 1.2 Description ICT In-circuit Test LGA775 socket The surface mount socket designed to accept the Intel® processor in the 775-Land LGA package MDA Manufacturing Defect Analyzer VCCP Processor core voltage VTT I/O termination voltage for the front side bus Reference Documents Document Document Location Intel® Socket Test Technology for the LGA775 Socket – Product Code JM8HKZLVA http://www.intel.com/des ign/pentium4/applnots/3 03334.
Theory 2 Theory The Intel® Socket Test Technology LGA775 socket test chip consists of an array of switch pairs. Each switch pair, together with a control signal, can be used to test one signal, one power, and one ground. The control signal enables the ON/OFF condition of each switch. Testing is accomplished by checking the ON and OFF condition of each switch. There are fewer signals than power and ground electrical socket connections.
Theory Figure 2 - Intel® Socket Test Technology for the LGA775 Socket - Block Diagram Product Code JM8YKZLVA (LGA775YP) So cket Sp rin g Pro b e/ T est Po in t Vccp1 Hig h Side Signal1 Vccp T ester Resou rces Pow er Supply + D igital R eceiver L o w Sid e Gnd1 Hcontrol_0 Gnd4 Lcontrol_0 D igital D river Pow er Supply D igital D river Gnd5 Vccp2 Hig h Side Signal2 D igital R eceiver L o w Sid e Gnd2 Vccp3 Hig h Side Signal2 L o w Sid e Gnd3 Gnd6 Hcontrol_1 D igital D river Lcontrol_1 D i
Powered Testing With Digital Vectors (ICT) 3 Powered Testing With Digital Vectors (ICT) 3.1 Using Voltage Identifier (VID) Signals VCCP and VTT are used to power the test chip. The test chip does not provide control on the VID signals to establish a VCCP voltage when plugged into a socket. A VID signal combination should be connected to ground and controlled by the test equipment in such a way that an on-board VCCP is generated that equals the onboard VTT voltage.
Powered Testing With Digital Vectors (ICT) Caution: At no time should the control signal for the High Side and Low Side switches be driven high at the same time, as occurs with some automated fault injection tools. A direct short from power to ground would result and possibly damage the Intel® Socket Test Technology test chip and the board under test. To prevent damage, drive only one control signal high at any time during the test while all others are low.
Powered Testing With Digital Vectors (ICT) 3.3 Using Test Head Loads Test head loads (pull-ups/pull-downs) improve the detection of opens. With the switch pair OFF, the signals would be pulled to a logic level low if test head pulldowns are used and a logic level high if test head pull-ups are used. Using pull-ups with the Low Side switch ON would receive a logic level high on the signal if the signal or GND connection were open and a logic level low if they were not open.
Using Voltage Identifier (VID) Signals 4 Using Voltage Identifier (VID) Signals VCCP and VTT are used to power the test chip. The test chip does not provide control on the VID signals to establish a VCCP voltage when plugged into a socket. A VID signal combination should be connected to ground and controlled by the test equipment in such a way that an on-board VCCP is generated that equals the onboard VTT voltage.
Using Voltage Identifier (VID) Signals damage, drive only one control signal high at any time during the test while all others are low. The High Side switch of each switch pair is used to test a VCCP solder ball and contact along with the shared signal solder ball and contact of the High and Low Side switch pair. The control line for the High Side switch is driven to a logic high, thus turning the switch ON and enabling an electrical connection between VCCP and the shared signal.
Using Voltage Identifier (VID) Signals 4.2 Using Test Head Loads Test head loads (pull-ups/pull-downs) improve the detection of opens. With the switch pair OFF, the signals would be pulled to a logic level low if test head pulldowns are used and a logic level high if test head pull-ups are used. Using pull-ups with the Low Side switch ON would receive a logic level high on the signal if the signal or GND connection were open and a logic level low if they were not open.
Using Voltage Identifier (VID) Signals 307507-002 17
Un-Powered Testing (MDA) 5 Un-Powered Testing (MDA) The following test method was developed using an Agilent* 3070 Series II In-circuit tester in an un-powered mode. The technique and results should be similar when using test equipment with similar capabilities as described below. (Please note that Agilent was formerly known as Hewlett Packard* or HP). Bus Description S Bus Primary Source. Provides -10.0 V to +10.
Un-Powered Testing (MDA) The resistance of the switch is equal to approximately 40 ohm in the ON state and is infinite in the OFF state. In an isolated environment, the ON state voltage measured at the signal would be approximately 44 mV as a voltage divider exists between the 40 ohm switch resistance and the 500 ohm resistance of the source termination. It has been observed that the OFF state voltage doesn’t reach the 600 mV level that circuit theory would lead one to expect.
Related Specifications 6 Related Specifications Operating temperature: Between 10 °C and 50 °C Electrostatic Discharge (ESD) Environment: Controlled to less than 300 V Table 7 - Electrical Operating Parameters Symbol Parameter Value Units 0.8 to 1.2 max V 300 mV Vccp Applied Voltage (Powered) CtrlOnThres Switch On Threshold HctrlEnVih High Switch Enable VIH (Powered) Vccp + 0.3 max V LctrlEnVih Low Switch Enable VIH (Powered) Vccp to Vccp + 0.3 max V CtrlDisVil Switch Disable VIL 0.
Related Specifications Table 9 - Test Condition for Low Side Switch (Powered Digital) Symbol Parameter Value Units 1.2 max V Vccp Applied Voltage Hcontrol Disable High Side Switch 0.0 V Lcontrol Enable Low Side Switch 1.
Ball Usage 7 Ball Usage Table 11 identifies the balls used for the 8 control lines, also referred to as Lcontrol_0 – Lcontrol_3 and Hcontrol_0 – Hcontrol_3. Table 11 - Balls Used as Control Signals Low Side Control (Lcontrol) High Side Control (Hcontrol) J16 U2 H15 U3 H16 D14 J17 E6 Table 12 maps the ball of the High and Low Side controls with the signal ball, ground ball and power ball for each switch pair. The table can be used to generate tests and diagnose test failures.
Ball Usage 307507-002 Low Side Control High Side Control Signal GND VCCP J16 U2 D17 AF28 N26 J16 U2 D13 E28 N27 J16 U2 E19 D24 N29 J16 U2 G19 E26 N28 J16 U2 E12 AF27 M23 J16 U2 D19 E25 N30 J16 U2 G12 B24 M25 J16 U2 F12 C24 M24 J16 U2 F11 AF26 M27 J16 U2 G11 B24 M26 J16 U2 G20 D21 M29 J16 U2 D11 F22 M28 J16 U2 D20 E20 K23 J16 U2 F20 A21 M30 J16 U2 E10 AF25 K25 J16 U2 C20 B20 K24 J16 U2 F21 C19 K27 J16 U2 D10 F19 K
Ball Usage 24 Low Side Control High Side Control Signal GND VCCP J16 U2 E9 B14 J23 J16 U2 E21 D12 J20 J16 U2 G9 A12 J21 J16 U2 B21 E11 J18 J16 U2 C21 B11 J19 J16 U2 B16 D9 C27 J16 U2 B18 C10 C25 J16 U2 B12 B8 C30 J16 U2 B15 A9 C29 J16 U2 A19 C7 B26 J16 U2 B10 F10 B25 J16 U2 A16 A6 B28 J16 U2 A17 D6 B27 J16 U2 A11 F4 B30 J16 U2 A14 B5 B29 J16 U2 A8 D3 A26 J16 U2 A10 C4 A25 J16 U2 F8 A2 A28 J16 U2 G8 E2 A27 J
Ball Usage 307507-002 Low Side Control High Side Control Signal GND VCCP H15 U3 R4 W4 AA8 H15 U3 V4 V7 AL19 H15 U3 M4 V6 AB8 H15 U3 M5 V3 AM19 H15 U3 M6 AJ20 AF22 H15 U3 W5 AG23 AE21 H15 U3 W6 U7 AC8 H15 U3 P3 AH23 AE22 H15 U3 M3 T6 AG19 H15 U3 L4 T7 U8 H15 U3 L5 AH20 AN21 H15 U3 Y4 AJ23 AN22 H15 U3 Y6 R2 AF19 H15 U3 P2 AK23 AE23 H15 U3 N2 AG20 AE19 H15 U3 L2 AK24 AK25 H15 U3 K3 P7 P8 H15 U3 K4 R7 T8 H15 U3 K6
Ball Usage 26 Low Side Control High Side Control Signal GND VCCP H15 U3 G5 AF24 AJ26 H15 U3 F5 L3 AG21 H15 U3 L1 AL24 AK26 H15 U3 K1 L7 J10 H15 U3 F2 L6 K8 H15 U3 E3 AL20 AH21 H15 U3 E4 AL23 AL25 H15 U3 AF4 K2 AJ21 H15 U3 AF5 AM24 AL26 H15 U3 D2 K5 J11 H15 U3 D4 K7 AJ22 H15 U3 C1 AM23 AN25 H15 U3 C2 AN24 AM26 H15 U3 C3 H3 AK21 H15 U3 C5 J4 J12 H15 U3 C6 AM20 AM25 H15 U3 B2 J7 J13 H15 U3 G7 AN23 AL21 H15 U3 B3
Ball Usage 307507-002 Low Side Control High Side Control Signal GND VCCP H16 D14 P6 AN16 Y8 H16 D14 T5 AA7 W8 H16 D14 U5 AC3 AB8 H16 D14 V5 AB7 AA8 H16 D14 U4 AC7 AL9 H16 D14 T4 AC6 AC8 H16 D14 R4 AM17 AD8 H16 D14 V4 AM16 AN15 H16 D14 M4 AD4 AN9 H16 D14 M5 AD7 AM9 H16 D14 M6 AL17 AM15 H16 D14 W5 AE2 AL9 H16 D14 W6 AE16 AN11 H16 D14 P3 AF3 AJ9 H16 D14 M3 AE7 AE9 H16 D14 L4 AE5 AK9 H16 D14 L5 AF7 AL11 H16 D14 Y4 AF6
Ball Usage 28 Low Side Control High Side Control Signal GND VCCP H16 D14 AB6 AK2 AL12 H16 D14 J5 AK2 AH12 H16 D14 J6 AK7 AJ12 H16 D14 AC5 AK17 AF12 H16 D14 AD5 AJ17 AL14 H16 D14 AD6 AE10 AE12 H16 D14 G5 AK7 AG12 H16 D14 F5 AF10 AJ14 H16 D14 L1 AG10 AH14 H16 D14 K1 AK16 AK14 H16 D14 F2 AH10 AG14 H16 D14 E3 AL10 AE18 H16 D14 E4 AJ10 AF14 H16 D14 AF4 AF16 AH18 H16 D14 AF5 AK10 AF18 H16 D14 D2 AM1 AJ18 H16 D14 D4 AM10 AG1
Ball Usage 307507-002 Low Side Control High Side Control Signal GND VCCP H16 D14 A5 AG13 AG15 H16 D14 AG4 AJ13 AE14 H16 D14 AG5 AF13 AF15 H16 D14 AG6 AH13 AH15 J17 E6 G16 L28 T28 J17 E6 G17 L29 T27 J17 E6 F15 L26 T26 J17 E6 G15 L27 T29 J17 E6 G14 L24 T23 J17 E6 F17 L25 T24 J17 E6 E15 P30 U30 J17 E6 F14 L23 T30 J17 E6 G18 P28 U28 J17 E6 E16 P29 U29 J17 E6 E18 P26 N24 J17 E6 F18 P27 N23 J17 E6 E13 P24 N25 J17 E6 G13
Ball Usage 30 Low Side Control High Side Control Signal GND VCCP J17 E6 D11 R23 W29 J17 E6 D20 V27 W23 J17 E6 F20 AK30 W24 J17 E6 E10 V26 W25 J17 E6 C20 V28 W26 J17 E6 F21 V23 Y30 J17 E6 D10 V24 AC23 J17 E6 C17 AA29 AC24 J17 E6 G22 AA30 Y29 J17 E6 C15 AA27 Y27 J17 E6 C18 AA28 Y28 J17 E6 C14 AA25 Y26 J17 E6 G21 AA26 AC25 J17 E6 C12 AA23 Y25 J17 E6 B19 AA24 Y23 J17 E6 B9 AB29 Y24 J17 E6 C11 AB30 AC26 J17 E6 F9 AB27
Ball Usage Low Side Control High Side Control Signal GND VCCP J17 E6 A16 AE29 AD24 J17 E6 A17 AE30 AC30 J17 E6 A11 AE27 AD23 J17 E6 A14 AE28 AG30 J17 E6 A8 AE25 AH30 J17 E6 A10 AE26 AC29 J17 E6 D22 AL27 AL30 J17 E6 E22 AN28 AN29 J17 E6 A22 AN27 AN30 J17 E6 B22 AM27 AM30 The test chip’s zero-ohm resistors, listed in Table 13, can be used to generate tests that can detect zero-ohm resistance between the two points, thus adding more open test coverage.
Ball Usage Table 14 - 1 kohm Measurements VID Ball Power Ball AM2 AL5 AM3 AL6 AK4 AL4 AJ8 AG9 AH8 AF8 AF9 AG8 Each pull-down resistor can be used to verify connectivity of a ground ball and a control signal ball. The following table can be used to generate tests that can detect 1 kohm resistance between the two points, thus adding more open test coverage. The resistor value RvalControl from Table 7 identifies the resistor tolerance.
Ball Usage Table 16 - 1 kohm Measurements Resistor Ball Resistor Ball AM5 AM7 AJ1 AD2 AG2 AJ3 AD1 AF1 AE1 R3 F28 F3 A13 B23 AL1 G2 H1 AJ7 AC2 N4 AC4 AH4 AJ5 AB3 H4 AH9 AH9 AJ2 AF2 AG3 AK3 AC1 AB2 AG1 Y1 G28 G23 T1 C22 AK1 R1 AL2 AH7 AE8 P5 AE4 AH5 AJ6 AD3 M2 Note: Changes from Test Chip JM8HKZLVA to Test Chip JM8YKZLVA Summary VSS pads (AL3, U1, G1, E29, A24, AN7) are not used. Pad (D14) replaces pad (E7) as an Hcontrol signal. E7 is not used. Pad (E6) replaces pad (F6) as an Hcontrol signal.
Ball Usage Table 17 - Package Resistive Measurements 34 Resistor Value Resistor Ball Resistor Ball JM8HKZLVA 0 ohm 0 ohm 1 kohm 1 kohm 1 kohm 1 kohm E7 F6 E7 F6 D14 E6 E23 F23 E8(GND) F7(GND) E8(GND) F7(GND) X X X X JM8YKZLVA (LGA775YP ) X X 307507-002
Ball Usage Figure 6 - Optimized Ball Coverage Map § 307507-002 35
