User's Manual

TASKS AND STATE TRANSITIONS
CPU
INTEL RESERVED
TYPE
DESCRIPTION
,
TASK REGISTER
0---
T55
-... DESCRIPTOR
IS 0
plop+1
TYPE I
8A5E
23
.
16
8A5E,5_0
1
AN AVAILABLE TASK STATE
SEGMENT MAY BE USED AS
THE DESTINATION OF A TASK
SWITCH OPERATION.
r---------,
I
PROGRAM INVISIBLE
I
I
LIMIT,S·O
A BUSY TASK STATE SEGMENT
I
15 0
I
I
LIMIT
]i
I
------
: I
BASE
I
0
I
------------
, ,
L ____
---
_...J
IS
TASK LOT SELECTOR
OS SELECTOR
55 SelECTOR
CS SELECTOR
ES SELECTOR
01
51
BP
SP
BX
TASK
OX
STATE
SEGMENT
ex
AX
FLAG WORD
IP {ENTRY POINT)
55 FOA CPL 2
SP FOR CPL 2
55 FOR CPL 1
SP FOR CPt: 1
58 FOR CPL 0
5P FDA CPl 0
BACK LINK SELECTOR TO TSS
(1) NEVER ALTERED (STATIC) AFTER INITIALIZATION BY 0.5.
"!"~!: VAIJ)I=c:..4.~ INITIAliZED FOR THIS TASK ARE ALWAYS
VALID SS:SP VALUES TO USE UPON ENTRY TO THAT
PRIVILEGE LEVEL (0, 1, OR 2) FROM A LEVEL OF
LESSER PRIVILEGE.
(2) CHANGED DURING TASK SWITCH
0
CANNOT BE USED AS THE
DESTINATION OF A TASK
SWITCH.
BYTE
OFFSET
/(1)
42 --------
40
P DESCRIPTION
1 BASE AND LIMIT FIEL.DS ARE VALID
38
0
SEGMENT IS NOT PRESENT IN
36
MEMORY. BASE AND LIMIT ARE
NOT DEFINED
34
32
30
28 CURRENT
TASK (2)
26 STATE
24
22
20
18
16
14
12)
10
BJ INITIAL
STACKS (1)
: FOR CPL 0.1.2
0_
Figure 8-1. Task State Segment and TSS Registers
8-2
G3010B