User's Manual

TASKS AND STATE TRANSITIONS
Note that the state of the outgoing task is always saved. If execution of that task is resumed, it will
start after the instruction that caused the task switch. The values of the registers will be the same as
that when the task stopped running.
Any task switch sets the Task Switched
(TS) bit in the Machine Status Word (MSW). This flag is
used when processor extensions such as the 80287 Numeric Processor Extension are present. The TS
bit signals that the context of the processor extension may not belong to the current 80286 task.
Chapter
11 discusses the TS bit and processor extensions in more detail.
Validity tests on a selector ensure that the selector
is in the proper table (i.e., the LDT selector refers
to GDT), lies within the bounds of the table, and refers to the proper type of descriptor (i.e., the LDT
selector refers to the LDT descriptor).
Note
that between steps 3 and 4 in table 8-1, all the registers of the new task are loaded. Several
protection rule violations may exist
in the new segment register contents. If an exception occurs in the
context of the
new task due to checks performed on the newly loaded descriptors, the DS and ES
segments may not be accessible even though the segment registers contain non-zero values. These selec-
tor values must be saved for later reuse. When the exception handler reloads these segment registers,
another protection exception may occur unless the exception handler pre-examines them and fixes any
potential problems.
A task switch allows flexibility in the privilege level of the outgoing and incoming tasks. The privilege
level at which execution resumes
in the incoming task is not restricted by the privilege level of the
outgoing task. This
is reasonable, since both tasks are isolated from each other with separate address
spaces and machine states. The privilege rules prevent improper access to a
TSS. The only interaction
between the tasks
is to the extent that one started the other and the incoming task may restart the
outgoing task by executing an
IRET instruction.
Table 8-1. Checks Made during a Task Switch
Test
.
Incoming TSS descriptor is present I
2 Incoming TSS is idle
3
Limit
of incoming TSS greater than 43
4 LOT selector
of incoming TSS is valid
5
LOT
of incoming TSS is present
6
CS selector is valid
7 Code segment is present
8 Code segment OPL matches CS RPL
9 Stack segment is valid
10
St~ck segment i", writ::lhlp. data segment
11
Stack segment is present
12
Stack segment OPL = CPL
13
OS/ES selectors are valid
14
OS/ES segments are r!3adable
15
OS/ES segments are present
16
OS/ES segment OPL ;::: CPL if not conform
*NP = Not-Present Exception
GP = General Protection Fault
SF = Stack Fault
8-6
Exception'
Error Code
NP
Incominq TSS'selector
GP
Incoming TSS selector
Invalid
TSS Incoming TSS selector
Invalid
TSS LOT selector
Invalid
TSS LOT selector
Invalid
TSS Code segment selector
NP
Code segment selector
Invalid
TSS
Code segment selector
SF Stack segment selector
GP Stack segment selector
SF Stack segment selector
SF Stack segment selector
GP Segment selector
GP Segment selector
NP Segment selector
GP Segment selector