User's Manual

SYSTEM CONTROL AND INITIALIZATION
Other privileged instructions are:
LIDT -Load interrupt descriptor table register
LMSW-Load machine status word
CL TS-Clear task switch flag
HALT-Halt processor execution
POPF (POP flags) or IRET can change the IF value only if the user is operating at a trusted
privilege level.
POPF does not change IOPL except at Level O.
"Trusted" instructions are restricted to execution at a privilege level of CPL ;::: 10PL. For each task,
the operating system defines a privilege level below which these instructions cannot be used. Most of
these instructions deal with input/output or interrupt management. The
10PL field in the flag word
that holds the privilege level limit can be changed only when
CPL=O. The trusted instructions are:
Input/Output-Block I/O, Input, and Output: IN, INW, OUT, OUTW, INSB, INSW, OUTSB,
OUTSW
Interrupts-Enable Interrupts, Disable Interrupts: ST!, CLI
Other-Lock Prefix
10.4 INITIALIZATION
Whenever the 80286 is initialized or reset, certain registers are set to predefined values. All additional
desired initialization must be performed
by user software. (See Appendix A for an example of a 286
initialization routine.)
RESET forces the 80286 to terminate all execution and local bus activity; no
instruction or bus action will occur as long as RESET is active. Execution in real address mode begins
after
RESET becomes inactive and an internal processing interval (3-4 clocks) occurs. The initial state
at reset
is:
FLAGS = 0002H
MSW = FFFOH
IP = FFFOH
CS Selector = FOOOH
DS Selector = OOOOH
ES Selector = OOOOH
IDT base = OOOOOOH
CS.base = FFOOOOH
DS.base = OOOOOOH
ES.base = OOOOOOH
IDT.limit = 03FFH
CS.limit = FFFFH
DS.limit = FFFFH
ES.limit = FFFFH
Two fixed areas of memory are reserved: the system initialization area and the interrupt table area.
The system initialization area begins at FFFFFOH (through FFFFFFH) and the interrupt table area
begins
at OOOOOOH (through 0003FFH). The interrupt table area is not reserved.
At this point, segment registers are valid and protection bits are set
to O. The 80286 begins operation
in real address mode, with
PE=O. Maskable interrupts are disabied, and no processor extensiull is
assumed or emulated (EM = MP=O).
DS, ES, and SS are initialized at reset to allow access to the first 64K of memory (exactly as in the
8086). The
CS:IP combination specifies a starting address of FFFFOH. For real address mode, the four
most significant bits are not used, providing the same
FFFOH address as the 8086 reset location. Use
of (or upgrade to) the protected mode can be supported by a bootstrap loader at the high end of the
address space.
As mentioned in Chapter 5, location FFFOH ordinarily contains a JMP instruction whose
target
is the actual beginning of a system initialization or restart program.
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