User's Manual

THE 80286 INSTRUCTION SET
AND-Logical AND
Opcode Instruction Clocks
20
Ir
AND eb,rb 2,mem=7
21
Ir
AND ew,rw 2,mem=7
22
Ir
AND rb,eb 2,mem=7
23
Ir
AND rw,ew 2,mem=7
24
db
AND AL,db
3
25 dw
AND AX,dw
3
80
14
db
AND eb,db
3,mem=7
81
14
dw AND eW,dw 3,mem=7
FLAGS MODIFIED
Overfiow=O, sign, zero, parity, carry=O
FLAGS UNDEFINED
Auxiliary carry
OPERATION
Description
Logical-AND byte register into EA byte
Logical-AND word register into
EA word
Logical-AND
EA byte into byte register
Logical-AND
EA word into word register
Logical-AND immediate byte into AL
Logical-AND immediate word into
AX
Logical-AND immediate byte into EA byte
Logical-AND immediate word into
EA word
Each bit of the result is a 1 if both corresponding bits of the operands were 1; it is 0 otherwise.
PROTECTED MODE EXCEPTIONS
#GP(O) if the result is in a non-writable segment. #GP(O) for an illegal memory operand effective
address
in the CS, DS, or ES segments; #SS(O) for an illegal address in the SS segment.
REAL ADDRESS MODE EXCEPTIONS
Interrupt 13 for a word operand at offset OFFFFH.
8-20