User's Manual

8086/8088 COMPATIBILITY CONSIDERATIONS
4. Use Interrupt 16 for Numeric Exceptions.
Any
80287 system must use interrupt vector 16 for the numeric error interrupt. If an 8086/8087
or 8088/8087 system uses another vector for the 8087 interrupt, both vectors should point at the
numeric error interrupt handler.
5. Numeric Exception Handlers Should allow Prefixes.
The saved
CS:IP value in the NPX environment save area will point at any leading prefixes before
an
ESC instruction. On 8086/8088 systems, this value points only at the ESC instruction.
6. Do Not Attempt Undefined 8086/8088 Operations.
Instructions like
POP CS or MOV CS,op will either cause exception 6 (undefined opcode) or
perform a protection setup operation like LIDT
on the 80286. Undefined bit encodings for bits
5-3 of the second byte of POP MEM or PUSH MEM will cause exception 13 on the 80286.
7. Place a Far JMP Instruction at FFFFOH.
After reset, CS:IP = FOOO:FFFO on the 80286 (versus FFFF:OOOO on the 8086/8088). This change
was made
to allow sufficient code space to enter protected mode without reloading CS. Placing a
far
JMP instruction at FFFFOH will avoid this difference. Note that the BOOTSTRAP option of
LOC86
will automatically generate this jump instruction.
8. Do not Rely on the Value Written by PUSH SP.
The 80286 will push a different value on the stack for PUSH SP than the 8086/8088. If the value
pushed
is important, replace PUSH SP instructions with the following three instructions:
PUSH BP
MOV BP,SP
XCHG BP,[BP]
This code functions
as the 8086/8088 PUSH SP instruction on the 80286.
9. Do not Shift or Rotate by More than 31 Bits.
The
80286 masks all shift/rotate counts to the low 5 bits. This MOD 32 operation limits the count
to a maximum of 31 bits. With this change, the longest shift/rotate instruction is 39 clocks. Without
this change, the longest shift/rotate instruction would be 264 clocks, which delays interrupt response
until the instruction completes execution.
10. Do not Duplicate Prefixes.
The
80286 sets an instruction length limit of 10 bytes. The only way to violate this limit is by
duplicating a prefix two or more times before an instruction. Exception 6 occurs if the instruction
length limit
is violated. The 8086/8088 has no instruction length limit.
11. Do not Rely on Odd 8086/8088 LOCK Characteristics.
The LOCK prefix and its corresponding output signal should only be used
to prevent other bus
masters from interrupting a data movement operation. The
80286 will always assert LOCK during
an XCHG instruction with memory (even if the LOCK prefix was not used). LOCK should only
be used with the XCHG,
MOV, MOVS, INS, and OUTS instructions.
The
80286 LOCK signal will not go active during an instruction prefetch.
12. Do not Single Step External Interrupt Handlers.
The priority of the
80286 single step interrupt is different from that of the 8086/8088. This change
was made to prevent an external interrupt from being single-stepped if it occurs while single stepping
through a program. The
80286 single step interrupt has higher priority than any external
interrupt.
The
80286 will still single step through an interrupt handler invoked by INT instructions or an
instruction exception.
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