User's Manual
SYSTEM-LEVEL NUMERIC PROGRAMMING
information
on
software emulation for the 80287
NPX
is
described in the "80287 Emulation" section
later in this chapter.
In any case, if
ESC
instructions are to be executed, either the MP or
EM
bit must be set, but not both.
Initializing the
80287
Initializing the 80287
NPX
simply means placing the
NPX
in
a known state unaffected by any activity
performed earlier. The example software routine to recognize the 80287 (table 3-1) performed this
initialization using a single
FNINIT
instruction. This instruction causes the
NPX
to be initialized
in
the same way
as
that
caused by the hardware
RESET
signal to the 80287. All the error masks are set,
all registers are tagged empty, the
ST
is
set to zero, and default rounding, precision, and infinity
controls are set. Table
3-1
shows the state of the 80287
NPX
following initialization.
Following a hardware
RESET
signal, such
as
after initial power-up, the 80287
is
initialized in Real-
Address mode. Once the 80287 has been switched to Protected mode (using the
FSETPM
instruction),
only another hardware
RESET
can switch the 80287 back
to
Real-Address mode. The
FNINIT
instruction does not switch the operating state of the 80287.
80287
Emulation
If
it
is
determined
that
no
80287
NPX
is
available
in
the system, systems software may decide to
emulate
ESC instructions in software. This emulation
is
easily supported
by
the 80286 hardware, because
the 80286 can be configured to trap to a software emulation routine whenever it encounters an
ESC
instruction
in
its instruction stream.
Table 3-1. NPX Processor State Following Initialization
Field Value
Interpretation
Control Word
Infinity Control
0
Projective
Rounding Control
00
Round to nearest
Precision Control
11
64
bits
Interrupt-Enable Mask
.1
Interrupts disabled
Exception Masks
111111
All exceptions masked
Status Word
Busy
0 Not busy
Condition Code
????
(Indeterminate)
Stack Top
000
Empty stack
Interrupt Request
0
No interrupt
Exception Flags
000000
No exceptions
Tag Word
Tags
11
Empty
Registers N.C. Not changed
Exception Pointers
Instruction Code N.C. Not changed
Instruction Address
N.C.
Not changed
Operand Address
N.C.
Not changed
3-5