Intel Pentium 4 Processor in the 423-pin Package

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Intel

Pentium

4 Processor in the 423-pin

Package at 1.30, 1.40, 1.50, 1.60, 1.70, 1.80,

1.90 and 2 GHz

Datasheet

Product Features

The Intel

Pentium

4 processor is designed for high-performance desktops and entry level

workstations. It is binary compatible with previous Intel Architecture processors. The Pentium 4

processor provides great performance for applications running on advanced operating systems

such as Windows* 98, Windows ME, Windows 2000 and UNIX*. This is achieved by the Intel

NetBurst™ micro-architecture which brings a new level of performance for system buyers. The

Pentium 4 processor extends the power of the Pentium III processor with performance headroom

for advanced audio and video internet capabilities. Systems based on Pentium 4 processors also

include the latest features to simplify system management and lower the total cost of ownership

for large and small business environments. The Pentium 4 processor offers great performance

for today’s and tomorrow’s applications.

■ Available at 1.30, 1.40,1.50, 1.60, 1.70,

1.80, 1.90 and 2 GHz

■ Binary compatible with applications

running on previous members of the Intel

microprocessor line

■ Intel

NetBurst™ micro-architecture

■ System bus frequency at 400 MHz

■ Rapid Execution Engine: Arithmetic Logic

Units (ALUs) run at twice the processor

core frequency

■ Hyper Pipelined Technology

■ Advance Dynamic Execution

—Very deep out-of-order execution

—Enhanced branch prediction

■ Level 1 Execution Trace Cache stores 12K

micro-ops and removes decoder latency

from main execution loops

■ 8 KB Level 1 data cache

■ 256 KB Advanced Transfer Cache (on-die,

full speed Level 2 (L2) cache) with 8-way

associativity and Error Correcting Code

(ECC)

■ 144 new Streaming SIMD Extensions 2

(SSE2) instructions

■ Enhanced floating point and multimedia

unit for enhanced video, audio, encryption,

and 3D performance

■ Power Management capabilities

—System Management mode

—Multiple low-power states

■ Optimized for 32-bit applications running

on advanced 32-bit operating systems

■ 8-way cache associativity provides

improved cache hit rate on reads/store

operations.

Order Number: 249198-005

August 2001

Summary of content (90 pages)

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Intel® Pentium® 4 Processor in the 423-pin Package at 1.30, 1.40, 1.50, 1.60, 1.70, 1.80, 1.90 and 2 GHz Datasheet Product Features ■ Available at 1.30, 1.40,1.50, 1.60, 1.70, 1.80, 1.
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Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document.
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Contents Contents 1.0 Introduction .................................................................................................................. 7 1.1 1.2 2.0 Electrical Specifications ........................................................................................11 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 3.0 BCLK Signal Quality Specifications and Measurement Guidelines.....................31 System Bus Signal Quality Specifications and Measurement Guidelines...........
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Contents 5.2 6.0 Thermal Specifications and Design Considerations ................................. 71 6.1 6.2 7.0 7.3 8.3 8.4 Introduction ......................................................................................................... 81 Mechanical Specifications................................................................................... 81 8.2.1 Boxed Processor Fan Heatsink Dimensions .......................................... 82 8.2.2 Boxed Processor Fan Heatsink Weight...........
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Contents Figures 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Typical VCCIOPLL, VCCA and VSSA Power Distribution ..................................14 Phase Lock Loop (PLL) Filter Requirements ......................................................15 AC Test Circuit ....................................................................................................26 TCK Clock Waveform.........................................................................
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Contents Tables 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 6 References............................................................................................................ 9 Voltage Identification Definition........................................................................... 13 System Bus Pin Groups ...................................................................................... 16 Processor DC Absolute Maximum Ratings ...
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Intel® Pentium® 4 Processor in the 423-pin Package 1.0 Introduction The Intel® Pentium® 4 Processor in the 423-pin Package socket with Intel® NetBurst microarchitechture is based on a new 32-bit micro-architecture that operates at significantly higher clock speeds and delivers performance levels that are significantly higher than previous generations of IA-32 processors. While based on the Intel® NetBurst micro-architecture, it still maintains the tradition of compatibility with IA-32 software.
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Intel® Pentium® 4 Processor in the 423-pin Package (4X data transfer rate, as in AGP 4X). Along with the 4X data bus, the address bus can deliver addresses two times per bus clock and is referred to as a ‘double-clocked’ or 2X address bus. In addition, the Request Phase completes in one clock cycle. Working together, the 4X data bus and 2X address bus provide a data bus bandwidth of up to 3.2 Gbytes/second (3200Mbytes/sec).
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Intel® Pentium® 4 Processor in the 423-pin Package 1.2 References Material and concepts available in the following documents may be beneficial when reading this document: Table 1. References Document Order Number1 Intel® Pentium® 4 Processor and Intel® 850 Chipset Platform Design Guide AP-485, Intel Processor Identification and the CPUID Instruction Intel® Pentium® 4 Processor Thermal Design Guidelines Intel® Pentium® 4 Processor EMI Guidelines 241618 Voltage Regulator Module (VRM) 9.
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Intel® Pentium® 4 Processor in the 423-pin Package 10
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Intel® Pentium® 4 Processor in the 423-pin Package 2.0 Electrical Specifications 2.1 System Bus and GTLREF Most system bus signals of the Intel® Pentium® 4 Processor in the 423-pin Package system bus signals use Assisted Gunning Transceiver Logic (AGTL+) signalling technology. As with the Intel P6 family of microprocessors, this signalling technology provides improved noise margins and reduced ringing through low voltage swings and controlled edge rates.
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Intel® Pentium® 4 Processor in the 423-pin Package 2.3.1 VCC Decoupling Regulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR) and keep a low interconnect resistance from the regulator (or VRM pins) to the socket. Bulk decoupling for the large current swings when the part is powering on, or entering/exiting low power states, must be provided by the voltage regulator solution (VRM).
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Intel® Pentium® 4 Processor in the 423-pin Package Table 2. Voltage Identification Definition Processor Pins 2.4.1 VID4 VID3 VID2 VID1 VID0 VCC_MAX 1 1 1 1 1 VRM output off 1 1 1 1 0 1.100 1 1 1 0 1 1.125 1 1 1 0 0 1.150 1 1 0 1 1 1.175 1 1 0 1 0 1.200 1 1 0 0 1 1.225 1 1 0 0 0 1.250 1 0 1 1 1 1.275 1 0 1 1 0 1.300 1 0 1 0 1 1.325 1 0 1 0 0 1.350 1 0 0 1 1 1.375 1 0 0 1 0 1.400 1 0 0 0 1 1.
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Intel® Pentium® 4 Processor in the 423-pin Package • • • • < 0.2 dB gain in pass band < 0.5 dB attenuation in pass band < 1 Hz (see DC drop in next set of requirements) > 34 dB attenuation from 1 MHz to 66 MHz > 28 dB attenuation from 66 MHz to core frequency The filter requirements are illustrated in Figure 2. For recommendations on implementing the filter refer to the Intel® Pentium® 4 Processor and Intel® 850 Chipset Platform Design Guide. Figure 1.
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Intel® Pentium® 4 Processor in the 423-pin Package . Figure 2. Phase Lock Loop (PLL) Filter Requirements 0.2 dB 0 dB -0.5 dB forbidden zone -28 dB forbidden zone -34 dB DC 1 Hz fpeak 1 MHz passband 66 MHz fcore high frequency band NOTES: 1. Diagram not to scale. 2. No specification for frequencies beyond fcore (core frequency). 3. fpeak, if existent, should be less than 0.05 MHz. 2.5 Reserved, Unused Pins, and TESTHI[10:0] All RESERVED pins must remain unconnected.
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Intel® Pentium® 4 Processor in the 423-pin Package TAP, Asynchronous GTL+ inputs, and Asynchronous GTL+ outputs do not include on-die termination. Inputs and used outputs must be terminated on the system board. Unused outputs may be terminated on the system board or left unconnected. Note that leaving unused output not terminated may interfere with some TAP functions, complicate debug probing, and prevent boudary scan testing.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 3.
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Intel® Pentium® 4 Processor in the 423-pin Package voltage level. Similar considerations must be made for TCK, TMS, and TRST#. Two copies of each signal may be required, with each driving a different voltage level. Refer to Chapter 9.0 for more detailed information. 2.9 Maximum Ratings Table 4 lists the processor’s maximum environmental stress ratings. Functional operation at the absolute maximum and minimum is neither implied nor guaranteed.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 5. Voltage and Current Specifications Symbol VCC Parameter Min Typ Max Unit Notes1 VCC for processor at 1.30 GHz 1.565 1.70 V 2, 3, 4, 9 1.40 GHz 1.560 1.70 V 2, 3, 4, 9 1.50 GHz 1.555 1.70 V 2, 3, 4, 9 1.30 GHz 1.605 1.75 V 2, 3, 4, 10 1.40 GHz 1.600 1.75 V 2, 3, 4, 10 VCC 1.50 GHz 1.595 1.75 V 2, 3, 4, 10 VID = 1.75V 1.60 GHz 1.590 1.75 V 2, 3, 4, 10 1.70 GHz 1.580 1.75 V 2, 3, 4, 10 1.80 GHz 1.
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Intel® Pentium® 4 Processor in the 423-pin Package 2. These voltages are targets only. A variable voltage source should exist on systems in the event that a different voltage is required. See Section 2.4 and Table 2 for more information. 3. The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE pins at the socket with a 100MHz bandwidth oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance.
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Intel® Pentium® 4 Processor in the 423-pin Package 3. VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high value. 4. VOH may experience excursions above VCC. However, input signal drivers must comply with the signal quality specifications in Chapter 3.0. 5. Refer to processor I/O Buffer Models for I/V characteristics. 6. The VCC referred to in these specifications is the instantaneous VCC. Table 8.
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Intel® Pentium® 4 Processor in the 423-pin Package 2. The tolerances for this specification have been stated generically to enable the system designer to calculate the minimum and maximum values across the range of VCC. 3. GTLREF should be generated from VCC by a voltage divider of 1% resistors or 1% matched resistors. Refer to the Intel® Pentium® 4 Processor and Intel® 850 Chipset Platform Design Guide for implementation details. 4.
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Intel® Pentium® 4 Processor in the 423-pin Package . Table 11. System Bus Common Clock AC Specifications T# Parameter Max T10: Common Clock Output Valid Delay 0.20 1.45 ns 6 4 T11: Common Clock Input Setup Time 0.65 ns 6 5 T12: Common Clock Input Hold Time 0.40 ns 6 5 T13: RESET# Pulse Width 1.00 ms 7 6, 7, 8 10.00 Unit Notes1,2,3 Min Figure NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. Not 100% tested.
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Intel® Pentium® 4 Processor in the 423-pin Package 3. All source synchronous AC timings are referenced to their associated strobe at GTLREF. Source synchronous data signals are referenced to the falling edge of their associated data strobe. Source synchronous address signals are referenced to the rising and falling edge of their associated address strobe. All source synchronous AGTL+ signal timings are referenced at GTLREF at the processor core. 4.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 15. TAP Signals AC Specifications Parameter T55: TCK Period Min Max 60.0 Unit Figure Notes1,2,3 1000 ns 4 T56: TCK Rise Time 9.5 ns 4 4 T57: TCK Fall Time 9.5 ns 4 4 T58: TMS Rise Time 8.5 ns 4 4 8.5 ns 4 -2 ns 5 T59: TMS Fall Time 4 T60: TMS Clock to Output Delay -5 T61: TDI Setup Time 0 ns 5, 8 T62: TDI Hold Time 3 ns 5, 8 T63: TDO Clock to Output Delay T64: TRST# Assert Time 0.5 3.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 3. AC Test Circuit VCC VCC Rload 600 mils, 42 ohms, 169 ps/in 2.4nH 1.2pF AC Timings test measurements made here. Rload = 50 ohms Figure 4.
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Intel® Pentium® 4 Processor in the 423-pin Package . Figure 5.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 7.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 9. Source Synchronous 4X Timings T0 T1 2.5 ns 5.0 ns T2 7.5 ns BCLK1 BCLK0 DSTBp# (@ driver) TH DSTBn# (@ driver) TA TB TA TD D# (@ driver) DSTBp# (@ receiver) TJ DSTBn# (@ receiver) TC D# (@ receiver) TE TG TE TG TA = T21: Source Sync. Data Output Valid Delay Before Data Strobe TB = T22: Source Sync. Data Output Valid Delay After Data Strobe TC = T27: Source Sync. Setup Time to BCLK TD = T30: Source Sync.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 11. Test Reset Timings TRST# 1.
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Intel® Pentium® 4 Processor in the 423-pin Package 3.0 System Bus Signal Quality Specifications Source synchronous data transfer requires the clean reception of data signals and their associated strobes. Ringing below receiver thresholds, non-monotonic signal edges, and excessive voltage swing will adversely affect system timings. Ringback and signal non-monotonicity cannot be tolerated since these phenomena may inadvertently advance receiver state machines or cause incorrect latching of data.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 12. BCLK[1:0] Signal Integrity Waveform Overshoot BCLK1 VH Rising Edge Ringback Crossing Voltage Threshold Region Crossing Voltage Ringback Margin Falling Edge Ringback, BCLK0 VL Undershoot 3.2 System Bus Signal Quality Specifications and Measurement Guidelines Many scenarios have been simulated to generate a set of AGTL+ layout guidelines which are available in the Intel® Pentium® 4 Processor and Intel® 850 Chipset Platform Design Guide.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 13. Low-to-High System Bus Receiver Ringback Tolerance VCC +100 mV GTLREF Noise Margin -100 mV VSS Figure 14. High-to-Low System Bus Receiver Ringback Tolerance VCC +100 mV GTLREF -100 mV Noise Margin VSS 3.3 System Bus Signal Quality Specifications and Measurement Guidelines 3.3.1 Overshoot/Undershoot Guidelines Overshoot (or undershoot) is the absolute value of the maximum voltage above or below VSS.
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Intel® Pentium® 4 Processor in the 423-pin Package When performing simulations to determine impact of overshoot and undershoot, ESD diodes must be properly modelled. ESD protection diodes do not act as voltage clamps and will not provide overshoot or undershoot protection. ESD diodes modelled within Intel I/O buffer models do not clamp undershoot or overshoot and will yield correct simulation results.
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Intel® Pentium® 4 Processor in the 423-pin Package meets the pulse duration for a specific magnitude where the AF < 1, means that there can be no other overshoot/undershoot events, even of lesser magnitude (note that if AF = 1, then the event occurs at all times and no other events can occur). Note 1: Activity factor for common clock AGTL+ signals is referenced to BCLK[1:0] frequency. Note 2: Activity factor for source synchronous (2x) signals is referenced to ADSTB[1:0]#.
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Intel® Pentium® 4 Processor in the 423-pin Package these worst case overshoot or undershoot events meet the specifications (measured time < specifications) in the table (where AF=1), then the system passes. The following notes apply to Table 18 through Table 21. NOTES: 1. Absolute Maximum Overshoot magnitude of 2.3V must never be exceeded. 2. Absolute Maximum Overshoot is measured relative to VSS, Pulse Duration of overshoot is measured relative to VCC. 3.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 18. Source Synchronous (400MHz) AGTL+ Signal Group Overshoot/Undershoot Tolerance (1.7V Processors) Absolute Maximum Overshoot (V) Absolute Maximum Undershoot (V) Pulse Duration (ns) AF = 1 Pulse Duration (ns) AF = 0.1 Pulse Duration (ns) AF = 0.01 2.30 -0.65 0.07 0.65 5.00 2.25 -0.60 0.12 1.22 5.00 2.20 -0.55 0.23 2.25 5.00 2.15 -0.50 0.42 4.15 5.00 2.10 -0.45 0.74 5.00 5.00 2.05 -0.40 1.38 5.00 5.00 2.00 -0.
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Intel® Pentium® 4 Processor in the 423-pin Package 3. AF is referenced to associated source synchronous strobes. 4. These specifications apply to “1.7V” processors, i.e., those with a VID = ‘00110’. Table 20. Common Clock (100MHz) AGTL+ Signal Group Overshoot/Undershoot Tolerance (1.7V Processors) Absolute Maximum Overshoot (V) Absolute Maximum Undershoot (V) Pulse Duration (ns) AF = 1 Pulse Duration (ns) AF = 0.1 Pulse Duration (ns) AF = 0.01 2.30 -0.65 0.26 2.60 20.0 2.25 -0.60 0.49 4.
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Intel® Pentium® 4 Processor in the 423-pin Package 2. This table assumes a 33MHz time domain. 3. These specifications apply to “1.7V” processors, i.e., those with a VID = ‘00110’. Table 22. Source Synchronous (400MHz) AGTL+ Signal Group Overshoot/Undershoot Tolerance (1.75V Processors) Absolute Maximum Overshoot (V) Absolute Maximum Undershoot (V) Pulse Duration (ns) AF = 1 2.30 -0.585 0.06 0.63 5.00 2.25 -0.535 0.11 1.10 5.00 2.20 -0.485 0.22 2.20 5.00 2.15 -0.435 0.41 4.10 5.00 2.
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Intel® Pentium® 4 Processor in the 423-pin Package 3. AF is referenced to associated source synchronous strobes. 4. These specifications apply to “1.75V” processors, i.e., those with a VID = ‘00100’ Table 24. Common Clock (100MHz) AGTL+ Signal Group Overshoot/Undershoot Tolerance (1.75V Processors) Absolute Maximum Overshoot (V) Absolute Maximum Undershoot (V) Pulse Duration (ns) AF = 1 Pulse Duration (ns) AF = 0.1 Pulse Duration (ns) AF = 0.01 2.30 -0.585 0.24 2.40 20.0 2.25 -0.535 0.44 4.
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Intel® Pentium® 4 Processor in the 423-pin Package 3. These specifications apply to “1.75V” processors, i.e., those with a VID = ‘00100’. Figure 15.
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Intel® Pentium® 4 Processor in the 423-pin Package 42
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Intel® Pentium® 4 Processor in the 423-pin Package 4.0 Package Mechanical Specifications The Intel® Pentium® 4 Processor in the 423-pin Package uses Pin Grid Array (PGA) package technology. Components of the package include an integrated heat spreader, processor silicon, silicon mounting substrate or Organic Land Grid Array (OLGA), and an interposer which is the pincarrier. Mechanical specifications for the processor are given in this section. See Section 1.1 for a terminology listing.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 17.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 26. Description Table for Processor Dimensions Code Letter Min Typ Max A 2.094 2.100 2.106 B 1.217 1.220 1.224 C 1.059 1.063 1.067 D 0.054 0.079 0.104 E 0.509 0.515 0.521 F 0.459 0.465 0.471 G 0.167 0.192 0.217 H 0.941 0.950 0.959 J 0.941 0.950 0.959 K 2 0.100 L 0.727 0.737 0.747 M 0.571 0.576 0.581 N 0.677 0.687 0.697 P 0.055 0.067 0.079 T 0.891 0.900 0.909 U V Notes1 3 0.100 0.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 19. Processor Pin Detail 1. All dimensions in inches. 2. 8 microinches Au over 80 microinches Ni, min. 3. .010 Diametric true position, pin to pin. Figure 20. IHS Flatness Specification 4.1 Package Load Specifications Table 27 provides dynamic and static load specifications for the Pentium 4 processor in the 423-pin package IHS.
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Intel® Pentium® 4 Processor in the 423-pin Package must not induce continuous stress onto the processor with the exception of a uniform load to maintain the heat sink-to-processor thermal interface. It is not recommended to use any portion of the processor interposer as a mechanical reference or load bearing surface for thermal solutions. Table 27.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 29. Processor Material Properties Component Material Nickel over copper Integrated Heat Spreader FR4 Interposer Gold over nickel Interposer pins 4.5 Notes Processor Markings The following section details the processor top-side laser markings and is provided to aid in the identification of the Pentium 4 processor. Specific details regarding individual fields in the product markings will be provided in a future release of the EMTS. Figure 21.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 22.
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Intel® Pentium® 4 Processor in the 423-pin Package 50
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Intel® Pentium® 4 Processor in the 423-pin Package 5.0 Pin Listing and Signal Definitions 5.1 Processor Pin Assignments Section 5.1 contains the pinlist for the Intel® Pentium® 4 Processor in the 423-pin Package in Table 30 and Table 31. Table 30 is a listing of all processor pins ordered alphabetically by pin name. Table 31 is also a listing of all processor pins but ordered by pin number. 5.1.1 Pin Listing by Pin Name Table 30. Table 30.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 30. Pin Name COMP0 Pin Listing by Pin Name Pin Number AU27 Signal Buffer Type Table 30.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 30. Pin Name Pin Listing by Pin Name Pin Number Signal Buffer Type Table 30.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 30. Pin Name Pin Listing by Pin Name Pin Number VCC AG37 VCC VCC Signal Buffer Type Table 30.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 30. Pin Name Pin Listing by Pin Name Pin Number Signal Buffer Type Table 30.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 30. Pin Name Pin Listing by Pin Name Pin Number Signal Buffer Type Table 30.
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Intel® Pentium® 4 Processor in the 423-pin Package 5.1.2 Pin Listing by Pin Number Table 31 contains a listing of the Pentium 4 processor pins in order by pin number. Table 31. Pin Listing by Pin Number Table 31.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 31. Pin Listing by Pin Number Pin Number Pin Name Signal Buffer Type Direction Table 31.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 31. Pin Listing by Pin Number Pin Number Pin Name Signal Buffer Type H36 LINT0 Asynch GTL+ H38 THERMDA J1 VCC J3 J5 Direction Input Table 31.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 31. Pin Listing by Pin Number Pin Number Pin Name Signal Buffer Type Y36 VCC Power/Other Y38 D0# Source Synch AA1 VCC AA3 AA5 Direction Table 31.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 31. Pin Listing by Pin Number Pin Number Pin Name Signal Buffer Type AM36 VCC Power/Other AM38 D20# Source Synch AN1 VCC AN3 AN5 Direction Table 31.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 31. Pin Listing by Pin Number Pin Number Pin Name Signal Buffer Type Direction Table 31.
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Intel® Pentium® 4 Processor in the 423-pin Package 5.2 Alphabetical Signals Reference Table 32. Signal Description (Page 1 of 8) Name Type Description 36 A[35:3]# Input/ Output A[35:3]# (Address) define a 2 -byte physical memory address space. In subphase 1 of the address phase, these pins transmit the address of a transaction. In sub-phase 2, these pins transmit transaction type information.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 32. Signal Description (Page 2 of 8) Name Type Description BINIT# (Bus Initialization) may be observed and driven by all processor system bus agents and if used, must connect the appropriate pins of all such agents. If the BINIT# driver is enabled during power-on configuration, BINIT# is asserted to signal any bus condition that prevents reliable future operation.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 32. Signal Description (Page 3 of 8) Name Type Description D[63:0]# (Data) are the data signals. These signals provide a 64-bit data path between the processor system bus agents, and must connect the appropriate pins on all such agents. The data driver asserts DRDY# to indicate a valid data transfer. D[63:0]# are quad-pumped signals and will thus be driven four times in a common clock period.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 32. Signal Description (Page 4 of 8) Name DRDY# Type Description Input/ Output DRDY# (Data Ready) is asserted by the data driver on each data transfer, indicating valid data on the data bus. In a multi-common clock data transfer, DRDY# may be deasserted to insert idle clocks. This signal must connect the appropriate pins of all processor system bus agents. Data strobe used to latch in D[63:0]#.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 32. Signal Description (Page 5 of 8) Name INIT# Type Input Description INIT# (Initialization), when asserted, resets integer registers inside the processor without affecting its internal caches or floating-point registers. The processor then begins execution at the power-on Reset vector configured during power-on configuration. The processor continues to handle snoop requests during INIT# assertion.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 32. Signal Description (Page 6 of 8) Name PWRGOOD Type Input Description PWRGOOD (Power Good) is a processor input. The processor requires this signal to be a clean indication that the clocks and power supplies are stable and within their specifications. ‘Clean’ implies that the signal will remain low (capable of sinking leakage current), without glitches, from the time that the power supplies are turned on until they come within specification.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 32. Signal Description (Page 7 of 8) Name SMI# Type Input Description SMI# (System Management Interrupt) is asserted asynchronously by system logic. On accepting a System Management Interrupt, the processor saves the current state and enter System Management Mode (SMM). An SMI Acknowledge transaction is issued, and the processor begins program execution from the SMM handler.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 32. Signal Description (Page 8 of 8) Name VID[4:0] VSSA VSSSENSE 70 Type Description Output VID[4:0] (Voltage ID) pins can be used to support automatic selection of power supply voltages. These pins are not signals, but are either an open circuit or a short circuit to VSS on the processor. The combination of opens and shorts defines the voltage required by the processor.
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Intel® Pentium® 4 Processor in the 423-pin Package 6.0 Thermal Specifications and Design Considerations Intel® Pentium® 4 Processor in the 423-pin Package use an integrated thermal heat spreader for heatsink attachment which is intended to provide for multiple types of thermal solutions. This section will provide data necessary for development of a thermal solution. See Figure 23 for an exploded view of an example Pentium 4 processor thermal solution. This is for illustration purposes only.
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Intel® Pentium® 4 Processor in the 423-pin Package 6.1 Thermal Specifications Table 33 specifies the thermal design power dissipation envelope for Pentium 4 processors. Analysis indicates that real applications are unlikely to cause the processor to consume its maximum possible power consumption. Intel recommends that system thermal designs target the “Thermal Design Power” indicated in Table 33. The Thermal Monitor feature (refer to Section 7.
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Intel® Pentium® 4 Processor in the 423-pin Package 6.2 Thermal Analysis 6.2.1 Measurements For Thermal Specifications 6.2.1.1 Processor Case Temperature Measurement The maximum and minimum case temperature (TCASE) for the Pentium 4 processor is specified in Table 33. This temperature specification is meant to ensure correct and reliable operation of the processor. Figure 24 illustrates where Intel recommends that TCASE thermal measurements should be made.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 26.
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Intel® Pentium® 4 Processor in the 423-pin Package 7.0 Features 7.1 Power-On Configuration Options Several configuration options can be configured by hardware. The Intel® Pentium® 4 Processor in the 423-pin Package sample its hardware configuration at reset, on the active-to-inactive transition of RESET#. For specifications on these options, please refer to Table 34. The sampled information configures the processor for subsequent operation.
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Intel® Pentium® 4 Processor in the 423-pin Package The system can generate a STPCLK# while the processor is in the AutoHALT Power Down state. When the system deasserts the STPCLK# interrupt, the processor will return execution to the HALT state. While in AutoHALT Power Down state, the processor will process bus snoops. Figure 27. Stop Clock State Machine HALT Instruction and HALT Bus Cycle Generated 2. Auto HALT Power Down State BCLK running. Snoops and interrupts allowed.
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Intel® Pentium® 4 Processor in the 423-pin Package RESET# will cause the processor to immediately initialize itself, but the processor will stay in Stop-Grant state. A transition back to the Normal state will occur with the de-assertion of the STPCLK# signal. When re-entering the Stop Grant state from the Sleep state, STPCLK# should only be de-asserted one or more bus clocks after the de-assertion of SLP#.
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Intel® Pentium® 4 Processor in the 423-pin Package 7.2.6 Deep Sleep State—State 6 Deep Sleep state is the lowest power state the processor can enter while maintaining context. Deep Sleep state is entered by stopping the BCLK[1:0] inputs (after the Sleep state was entered from the assertion of the SLP# pin). The processor is in Deep Sleep state immediately after BLCK[1:0] is stopped. To provide maximum power conservation hold the BLCK0 input at VOL and the BCLK1 input at VOH during the Deep Sleep state.
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Intel® Pentium® 4 Processor in the 423-pin Package The TCC may also be activated via On-Demand mode. If bit 4 of the ACPI Thermal Monitor Control Register is written to a “1” the TCC will be activated immediately, independent of the processor temperature. When using On-Demand mode to activate the TCC, the duty cycle of the clock modulation is programmable via bits 3:1 of the same ACPI Thermal Monitor Control Register.
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Intel® Pentium® 4 Processor in the 423-pin Package Table 36.
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Intel® Pentium® 4 Processor in the 423-pin Package 8.0 Boxed Processor Specifications 8.1 Introduction The Intel® Pentium® 4 Processor in the 423-pin Package is also offered as an Intel boxed processor. Intel boxed processors are intended for system integrators who build systems from system boards and components. The boxed Pentium 4 processor will be supplied with a cooling solution.
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Intel® Pentium® 4 Processor in the 423-pin Package 8.2.1 Boxed Processor Fan Heatsink Dimensions The boxed processor will be shipped with an unattached fan heatsink. Clearance is required around the fan heatsink to ensure unimpeded airflow for proper cooling (see Figure 33 and Figure 34). The physical space requirements and dimensions for the boxed processor with assembled fan heatsink are shown in Figure 29 (Side Views), and Figure 30 (Top View).
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 30. Top View Space Requirements for the Boxed Processor 8.2.2 Boxed Processor Fan Heatsink Weight The boxed processor fan heatsink will not weigh more than 450 grams. See Chapter 4.0 and the Intel® Pentium® 4 Processor Thermal Design Guidelines for details on the processor weight and heatsink requirements.
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Intel® Pentium® 4 Processor in the 423-pin Package 8.3 Boxed Processor Requirements 8.3.1 Fan Heatsink Power Supply The boxed processor's fan heatsink requires a +12V power supply. A fan power cable will be shipped with the boxed processor to draw power from a power header on the system board. The power cable connector and pinout are shown in Figure 31. Platforms must provide a matched power header to support the boxed processor.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 32. Acceptable System Board Power Header Placement Relative to Processor Socket 8.4 Thermal Specifications This section describes the cooling requirements of the fan heatsink solution utilized by the boxed processor. 8.4.1 Boxed Processor Cooling Requirements The boxed processor may be directly cooled with a fan heatsink.
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Intel® Pentium® 4 Processor in the 423-pin Package Figure 33. Boxed Processor Fan Heatsink Airspace Keepout Requirements (side 1 view) Figure 34.
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Intel® Pentium® 4 Processor in the 423-pin Package 8.4.2 Variable Speed Fan The boxed processor fan will operate at different speeds over a short range of internal chassis temperatures. This allows the processor fan to operate at a lower speed while internal chassis temperatures are low. If internal chassis temperature increases beyond a lower set point, the fan speed will rise linearly with the internal temperature until the upper set point is reached. At that point, the fan speed is at its maximum.
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Intel® Pentium® 4 Processor in the 423-pin Package 9.0 Debug Tools Specifications 9.1 Logic Analyzer Interface (LAI) Intel is working with two logic analyzer vendors to provide logic analyzer interfaces (LAIs) for use in debugging Pentium 4 processor systems. Tektronix* and Agilent* should be contacted to get specific information about their logic analyzer interfaces. The following information is general in nature. Specific information must be obtained from the logic analyzer vendor.
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