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Pentium

II Processor at 350 MHz,

400 MHz, and 450 MHz

Datasheet

Product Features

The Intel Pentium

II processor is designed for high-performance desktops and for workstations

and servers. It is binary compatible with previous Intel Architecture processors. The Pentium II

processor provides the best performance available for applications running on advanced

operating systems such as Windows* 95, Windows NT and UNIX*. This is achieved by

integrating the best attributes of Intel processors—the dynamic execution, Dual Independent Bus

architecture plus Intel MMX™ technology—bringing a new level of performance for systems

buyers. The Pentium II processor is scaleable to two processors in a multiprocessor system and

extends the power of today’s Pentium II processor with performance headroom for business

media, communication and internet capabilities. Systems based on Pentium II processors also

include the latest features to simplify system management and lower the cost of ownership for

large and small business environments. The Pentium II processor offers great performance for

today’s and tomorrow’s applications.

•

Available at 350 MHz, 400 MHz, and

450 MHz frequencies

•

System bus frequency at 100 MHz

•

Binary compatible with applications

running on previous members of the Intel

microprocessor line

•

Dynamic execution micro architecture

•

Dual Independent Bus architecture:

Separate dedicated external System Bus

and dedicated internal high-speed cache

bus

•

Power Management capabilities

—System Management mode

—Multiple low-power states

•

Optimized for 32-bit applications running

on advanced 32-bit operating systems

•

Single Edge Contact Cartridge (S.E.C.C.)

and S.E.C.C.2 packaging technology; the

S.E.C. cartridges deliver high performance

with improved handling protection and

socketability

•

Integrated high performance 16 KB

instruction and 16 KB data, nonblocking,

level one cache

•

Available with integrated 512 KB unified,

nonblocking, level two cache

•

Enables systems which are scaleable up to

two processors

•

Error-correcting code for System Bus data

Order Number: 243657-003

August 1998

Summary of content (84 pages)

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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Datasheet Product Features • • • • • • Available at 350 MHz, 400 MHz, and 450 MHz frequencies System bus frequency at 100 MHz Binary compatible with applications running on previous members of the Intel microprocessor line Dynamic execution micro architecture Dual Independent Bus architecture: Separate dedicated external System Bus and dedicated internal high-speed cache bus Power Management capabilities — System Management mode — Multiple low-power
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Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Contents 1.0 Introduction......................................................................................................................... 7 1.1 1.2 2.0 Electrical Specifications.................................................................................................... 10 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 3.0 3.2 3.3 Thermal Specifications ...................................................................
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 5.2 5.3 5.4 6.0 Boxed Processor Specifications....................................................................................... 64 6.1 6.2 6.3 6.4 7.0 S.E.C.C.2 Mechanical Specification.................................................................... 52 Processor Package Materials Information .......................................................... 57 Pentium® II Processor Signal Listing ...................................................
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pentium® II Processor (S.E.C.C. Package)—Extended Thermal Plate Attachment Detail Dimensions, Continued.......................................................... 50 Pentium® II Processor Substrate (S.E.C.C. Package)—Edge Finger Contact Dimensions ............................................................................................50 Pentium® II Processor Substrate (S.E.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 6 Non-AGTL+ Signal Group DC Specifications...................................................... 24 AGTL+ Bus Specifications ................................................................................. 25 System Bus AC Specifications (Clock) at the Processor Edge Fingers .............
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 1.0 Introduction The Pentium II 350 MHz/400 MHz/450 MHz processor is the next in the Pentium II processor line of Intel processors. The Pentium II processor, like the Pentium Pro processor, implements a Dynamic Execution microarchitecture—a unique combination of multiple branch prediction, data flow analysis, and speculative execution.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 1. Second Level (L2) Cache Implementations Processor Core Processor Core L2 Tag L2 ®® Pentium Pentium Pro ProProcessor Processor Dual Cavity Dual Die Cavity Package Pentium II Processor Pentium® II Processor Substrate and Components Substrate and Components v001 1.1 Terminology In this document, a ‘#’ symbol after a signal name refers to an active low signal.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz • Extended Thermal Plate—This S.E.C.C. 100 MHz processor feature is the surface used to attach a heatsink or other thermal solution to the processor. The extended thermal plate has an extended skirt as compared to the 66 MHz Pentium II processors for increased thermal capabilities. • Cover—The plastic casing that covers the backsire of the substrate and holds processor branding and marking information. • Latch arms—An S.E.C.C.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz — Volume III: System Programming Guide (Order Number 243192) • P6 Family of Processors Hardware Developer’s Manual (Order Number 244001) • Pentium® II Processor I/O Buffer Models, Quad Format (developer.intel.com) 2.0 Electrical Specifications 2.1 Processor System Bus and VREF Most Pentium II processor signals use a variation of the low voltage Gunning Transceiver Logic (GTL) signaling technology.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 2. AGTL+ Bus Topology Pentium® II Processor 2.2 ASIC ASIC Pentium II Processor Clock Control and Low Power States Pentium II processors allow the use of AutoHALT, Stop-Grant, Sleep, and Deep Sleep states to reduce power consumption by stopping the clock to internal sections of the processor, depending on each particular state. See Figure 3 for a visual representation of the Pentium II processor low power states. Figure 3.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz For the processor to fully realize the low current consumption of the Stop-Grant, Sleep, and Deep Sleep states, a Model Specific Register (MSR) bit must be set. For the MSR at 02AH (Hex), bit 26 must be set to a ‘1’ (this is the power on default setting) for the processor to stop all internal clocks during these modes. For more information, see the Pentium® II Processor Developer's Manual (Order Number 243502).
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz While in the Stop-Grant State, SMI#, INIT#, and LINT[1:0] will be latched by the processor, and only serviced when the processor returns to the Normal state. Only one occurrence of each event will be recognized upon return to the Normal state. 2.2.4 HALT/Grant Snoop State—State 4 The processor will respond to snoop transactions on the Pentium II processor system bus while in Stop-Grant state or in AutoHALT Power Down state.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz While in Deep Sleep state, the processor is incapable of responding to snoop transactions or latching interrupt signals. No transitions or assertions of signals are allowed on the system bus while the processor is in Deep Sleep state. Any transition on an input signal before the processor has returned to Stop-Grant state will result in unpredictable behavior. 2.2.7 Clock Control The processor provides the clock signal to the L2 cache.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 2.4.1 Processor VCCCORE Decoupling Regulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR) and keep an interconnect resistance from the regulator (or VRM pins) to the SC 242 connector of less than 0.3 mΩ. This can be accomplished by keeping a maximum distance of 1.0 inches between the regulator output and SC 242 connector. The recommended VCCCORE interconnect is a 2.0 inch wide (the width of the VRM 8.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz To ensure the system is ready for current and future Pentium II processors, the range of values in bold in Table 1 must be supported. A smaller range will risk the ability of the system to migrate to a higher performance Pentium II processor and/or maintain compatibility with current Pentium II processors. Table 1. Voltage Identification Definition 1, 2, 3 Processor Pins VID4 VID3 0 0 0 VID2 VID1 VID0 1 0 1 1.80 4 0 1 0 0 1.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz pull-ups. A resistor of greater than or equal to 10 kΩ may be used to connect the VID signals to the converter input. Note that no changes have been made to the physical connector between the VRM 8.1 and VRM 8.2 specifications, though pin definitions have changed. 2.7 Processor System Bus Unused Pins All RESERVED pins must remain unconnected.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 2. Recommended Pull-up Resistor Values (Approximate) for CMOS Signals 1, 2, 3 Recommended Resistor Value (Approximate) 150Ω CMOS Signal TDI, TDO, TMS, PICD[0], PICD[1] 150Ω – 220Ω FERR#, IERR#, THERMTRIP# 150Ω – 330Ω A20M#, IGNNE#, INIT#, LINT[1]/NMI, LINT[0]/INTR, PWRGOOD, SLP#, PREQ# 410Ω STPCLK#, SMI# 500Ω FLUSH# 1KΩ–100KΩ TESTHI4 NOTES: 1.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 3.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz motherboards which support operation at either 66 or 100 MHz, this signal must be pulled up to 3.3 V with a 1/4 W, 200Ω resistor (as shown in Figure 4) and provided as a frequency selection signal to the clock driver/synthesizer. If the system motherboard is not capable of operating at 100 MHz (e.g., Intel 440FX PCIset and 440LX AGPset-based systems), it should ground this signal and generate a 66 MHz system bus frequency.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 4. Absolute Maximum Ratings Symbol Parameter Min Max Unit TSTORAGE Processor storage temperature –40 85 °C VCC(All) Any processor supply voltage with respect to V SS –0.5 Operating voltage + 1.0 V VinAGTL AGTL+ buffer DC input voltage with respect to VSS –0.3 VCCCORE + 0.7 V VinCMOS CMOS buffer DC input voltage with respect to VSS –0.3 3.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 5. Voltage and Current Specifications 1 Symbol 22 Parameter Core Freq Min Typ Max Unit Notes V CCCORE VCC for processor core 1.9 2.00 2.1 V 2, 4, 5, 6 V CCL2 VCC for second level cache 3.135 3.30 3.465 V 3.3 V ±5% 7 V TT AGTL+ bus termination voltage 1.365 1.50 1.635 V 1.5 ±9% 8 Baseboard Tolerance, Static Processor core voltage static tolerance level at SC 242 pins –0.070 0.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies and cache sizes. 2. VccCORE and IccCORE supply the processor core and the TagRAM and BSRAM I/O buffers. 3. This specification applies only to the Pentium® II processor. Unless otherwise noted, this specification applies to all Pentium II processor frequencies and cache sizes. 4.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 6. AGTL+ Signal Groups DC Specifications 1 Symbol Parameter Min Max Unit Notes V IL Input Low Voltage –0.3 0.82 V V IH Input High Voltage 1.22 VTT V 2, 3, 7, 8 Ron Buffer On Resistance 16.67 Ω 6 IL Leakage Current ±100 µA 4 I LO Output Leakage Current ±15 µA 5 NOTES: 1. Unless otherwise noted, all specifications in this table apply to all Pentium® II processor frequencies and cache sizes. 2.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz intrinsic trace capacitance for the AGTL+ signal group traces is known and well-controlled. For more details on GTL+, see the Pentium® II Processor Developer's Manual (Order Number 243502) and AP-827, 100 MHz GTL+ Layout Guidelines for the Pentium ® II Processor and Intel® 440BX AGPset (Order Number 243735). Table 8.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 9. System Bus AC Specifications (Clock) at the Processor Edge Fingers 1, 2, 3 T# Parameter Min Nom System Bus Frequency T1’: BCLK Period Max Unit 100.00 MHz 10.0 T1B’: SC 242 to Core Logic BCLK Offset 0.78 Notes Figure All processor core frequencies 4 ns 6 4, 5 ns 6 Absolute Value 7, 8 T2’: BCLK Period Stability See Table 10 T3’: BCLK High Time 2.1 ns 6 @>2.0 V 6 T4’: BCLK Low Time 1.97 ns 6 @<0.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 10. System Bus AC Specifications (Clock) at Processor Core Pins 1, 2, 3 T# Parameter Min Nom System Bus Frequency T1: BCLK Period Max Unit 100.00 MHz 10.0 T2: BCLK Period Stability ±250 Figure Notes All processor core frequencies 4 ns 6 4, 5, 6, 10 ps 6 6, 7, 8, 10 T3: BCLK High Time 2.6 ns 6 @>2.0 V 6 T4: BCLK Low Time 2.47 ns 6 @<0.5 V 6 T5: BCLK Rise Time 0.38 1.25 ns 6 (0.5 V–2.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 12. System Bus AC Specifications (AGTL+ Signal Group)at the Processor Edge Fingers 1, 2, 3 Notes T# Parameter Min Max Unit Figure T7’: AGTL+ Output Valid Delay 0.71 4.66 ns 7 4 T8’: AGTL+ Input Setup Time 1.97 ns 8 5, 6, 7 T9’: AGTL+ Input Hold Time 1.61 ns 8 8 T10’: RESET# Pulse Width 1.00 ms 10 9 NOTES: 1.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 14. System Bus AC Specifications (CMOS Signal Group) at the Processor Edge Fingers 1, 2, 3, 4 Notes T# Parameter Min Max Unit Figure T11’: CMOS Output Valid Delay 1.00 10.5 ns 7 5 T12’: CMOS Input Setup Time 4.50 ns 8 6, 7, 8 T13’: CMOS Input Hold Time 1.50 ns 8 6, 7 T14’: CMOS Input Pulse Width, except PWRGOOD 2 BCLKs 7 Active and Inactive states T15’: PWRGOOD Inactive Pulse Width 10 BCLKs 7, 10 8 NOTES: 1.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 16.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 18. System Bus AC Specifications (APIC Clock and APIC I/O)at the Processor Core Pins 1, 2, 3 Notes T# Parameter Min Max Unit T21: PICCLK Frequency 2.0 33.3 MHz T22: PICCLK Period 30.0 500.0 ns T23: PICCLK High Time 12.0 ns 6 T24: PICCLK Low Time 12.0 ns 6 T25: PICCLK Rise Time 1.0 5.0 ns 6 T26: PICCLK Fall Time 1.0 5.0 ns 6 T27: PICD[1:0] Setup Time 8.0 ns 8 T28: PICD[1:0] Hold Time 2.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz NOTES: 1. Unless otherwise noted, all specifications in this table apply to all Pentium® II processor frequencies and cache sizes. 2. All AC timings for the TAP signals are referenced to the TCK rising edge at 0.7 V at the processor edge fingers. All TAP signal timings (TMS, TDI, etc.) are referenced at 1.25 V at the processor edge fingers. 3. Not 100% tested. Specified by design characterization. 4.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 5. BCLK to Core Logic Offset BCLK at Edge Fingers 0.5V T7 BCLK at Core Logic 1.25V 000807 Note: For Figure 6 through Figure 12, the following apply: 1. Figure 6 through Figure 12 are to be used in conjunction with Table 9 through Table 20. 2. All AC timings for the AGTL+ signals at the processor edge fingers are referenced to the BCLK rising edge at 0.50 V.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 6. BCLK, PICCLK, and TCK Generic Clock Waveform th tr 1.7V (2.0V*) 1.25V CLK 0.7V (0.5V*) tf tl tp Tr Tf Th Tl Tp = = = = = T5, T6, T3, T4, T1, pT25, T34 (Rise Time) T26, T35 (Fall Time) T23, T32 (High Time) T24, T33 (Low Time) T22, T31 (BLCK, TCK, PCICLK Period) Note: BCLK is referenced to 0.5 V and 2.0 V. PICCLK and TCK are referenced to 0.7 V and 1.7 V 000761a Figure 7.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 9.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 11. Test Timings (TAP Connection) 1.25V TCK Tv Tw Tr Ts 1.25V TDI, TMS Input Signals Tx Tu Ty Tz TDO Output Signals Tr = T43 (All Non-Test Inputs Setup Time) Ts = T44 (All Non-Test Inputs Hold Time) Tu = T40 (TDO Float Delay) Tv = T37 (TDI, TMS Setup Time) Tw = T38 (TDI, TMS Hold Time) Tx = T39 (TDO Valid Delay) Ty = T41 (All Non-Test Outputs Valid Delay) Tz = T42 (All Non-Test Outputs Float Delay) PCB766a Figure 12.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 3.1 System Bus Clock (BCLK) Signal Quality Specifications and Measurement Guidelines Table 21 describes the signal quality specifications at the processor core for the Pentium II processor system bus clock (BCLK) signal. Table 22 describes guidelines for signal quality measurement at the processor edge fingers. Figure 13 describes the signal quality waveform for the system bus clock at the processor core pins.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 22. BCLK Signal Quality Guidelines for Edge Finger Measurement 1 T# Parameter Min Nom V1’: BCLK VIL V2’: BCLK VIH 2.0 V3’: VIN Absolute Voltage Range –0.5 V4’: Rising Edge Ringback 2.0 Unit Figure 0.5 V 14 V 14 3.3 V5’: Falling Edge Ringback V6’: Tline Ledge Voltage Max 1.0 V7’: Tline Ledge Oscillation Notes V 14 2 V 14 3 0.5 V 14 3 1.7 V 14 At Ledge Midpoint 4 0.2 V 14 Peak-to-Peak 5 NOTES: 1.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 23 provides the AGTL+ signal quality specifications for Pentium II processors for use in simulating signal quality at the processor core. Table 24 provides AGTL+ signal quality guidelines for measuring and testing signal quality at the processor edge fingers. Figure 15 describes the signal quality waveform for AGTL+ signals at the processor core and edge fingers.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 15. Low to High AGTL+ Receiver Ringback Tolerance τ α VREF +0.2 φ VREF ρ VREF –0.2 δ 0.7V Clk Ref Vstart Clock Time Note: High to Low case is analogous. 000914a 3.3 Non-AGTL+ Signal Quality Specifications and Measurement Guidelines There are three signal quality parameters defined for non-AGTL+ signals: overshoot/undershoot, ringback, and settling limit.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 3.3.1 Overshoot/Undershoot Guidelines Overshoot (or undershoot) is the absolute value of the maximum voltage above the nominal high voltage or below VSS. The overshoot/undershoot guideline limits transitions beyond VCC or VSS due to the fast signal edge rates. (See Figure 16 for non-AGTL+ signals.) The processor can be damaged by repeated overshoot events on 2.5 V tolerant buffers if the charge is large enough (i.e., if the overshoot is great enough).
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 3.3.3 Settling Limit Guideline Settling limit defines the maximum amount of ringing at the receiving pin that a signal must reach before its next transition. The amount allowed is 10% of the total signal swing (VHI –VLO) above and below its final value. A signal should be within the settling limits of its final value, when either in its high state or low state, before it transitions again.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 4.1 Thermal Specifications Table 27 and Table 28 provide the thermal design power dissipation and maximum and minimum temperatures for Pentium II processors with S.E.C.C. and S.E.C.C.2 package technologies, respectively. While the processor core dissipates the majority of the thermal power, thermal power dissipated by the L2 cache also impacts the overall processor power specification.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz For S.E.C.C.2 packaged processors, no extended thermal plate exists and thermal solutions need to contact the core package directly and attach through the substrate to the cover. The total processor power that must be dissipated for S.E.C.C.2 processors can be thought of just as it is for S.E.C.C. packaged processors: a combination of both the processor core and L2 cache.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 5.1 S.E.C.C. Mechnical Specifications S.E.C.C. package drawings and dimension details are provided in Figure 18 through Figure 27. Figure 18 shows all views of the Pentium II processor in an S.E.C.C. package; Figure 19 through Figure 22 show the S.E.C.C. package dimensions; Figure 23 and Figure 24 show the extended thermal plate dimensions; and Figure 25 and Figure 26 provide details of the processor substrate edge finger contacts.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 19. Pentium® II Processor (S.E.C.C. Package)—Extended Thermal Plate Side Dimensions 3.805±.020 2.473±.016 2.070±.020 2X .125±.005 1.235±.020 2X .342±.005 These dimensions are from the bottom of the substrate edge fingers 2X .365±.005 1.745±.005 1.877±.020 v005a Figure 20. Pentium® II Processor (S.E.C.C. Package)—Bottom View Dimensions 5.255±.006 Cover Thermal Plate 2.181±.015 3.243±.015 5.341±.010 5.505±.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 21. Pentium® II Processor (S.E.C.C. Package)—Latch Arm, Extended Thermal Plate Lug, and Cover Lug Dimensions 2X 0.238 2X 0.103 ± 0.005 2X 0.174 ±0.005 2X 0.647 ±0.020 2X 0.488 ±0.020 2X 0.058 ±0.005 2X 0.136 ±0.005 Left 2X 0.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 22. Pentium® II Processor (S.E.C.C. Package)—Latch Arm, Extended Thermal Plate, and Cover Detail Dimensions (Reference Dimensions Only) 0.075 0.236 0.122 0.113 0.084 Detail A Detail B (Bottom Side View) 0.120 Min. 0.316 0.116 0.082 0.216 0.291 0.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 2.110 ±0.008 +0.001 –0.002 6X 0.124 Datasheet 0.375 ±0.008 0.000 0.250 ±0.008 0.500 ±0.008 0.978 ±0.008 0.000 Detail A 4X 0.365 ±0.005 8X R 0.0625 ±0.002 See Detail A 001051 Figure 23. Pentium® II Processor (S.E.C.C.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 24. Pentium® II Processor (S.E.C.C. Package)—Extended Thermal Plate Attachment Detail Dimensions, Continued 0.0032 / 1.000 x 1.000 1.250 2.500 v008 Figure 25. Pentium® II Processor Substrate (S.E.C.C. Package)—Edge Finger Contact Dimensions Thermal Plate Cover Pin A1 Pin A121 Y Substrate See Detail A in Next Figure 1.85 2.835 W 2.992 ±.008 .045 .062 70° +.007 -.005 Z 2.01 ±.008 5.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 26. Pentium® II Processor Substrate (S.E.C.C. Package)—Edge Finger Contact Dimensions, Detail A .098 .098 Pin A74 Pin A73 .010 .008 .360 .045 .236 .138 ±.005 .039 Y .074 ±.002 W 121 X 0.043 ±.002 .008 ZW .002 Z 121 X 0.16 ±.002 .008 .002 .037 ZW Z NOTE: 1. All dimensions without tolerance information are considered reference dimensions only. 2. Z reference datum shown in Figure 35 010.vsd Figure 27.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 31. Description Table for Processor Markings (S.E.C.C. Packaged Processor) Code Letter 5.2 Description A Logo B Product Name C Trademark D Logo E Product Name F Dynamic Mark Area – with 2-D matrix S.E.C.C.2 Mechanical Specification S.E.C.C.2 packaged drawings and dimension details are provided in Figure 28 through Figure 35. Figure 28 shows all views of the Pentium II processor in an S.E.C.C.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 29. Pentium® II Processor (S.E.C.C.2 Package) Top and Side Views—PLGA Processor Core Figure 30. Pentium® II Processor Assembly (S.E.C.C.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 31. Pentium® II Processor Assembly (S.E.C.C.2 Package)—Cover View with Dimensions PLGA OLGA Figure 32. Pentium® II Processor Assembly (S.E.C.C.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 33. Pentium® II Processor Assembly (S.E.C.C.2 Package), Side View—OLGA Substrate Shown PLG A OLG A S ee F ig u re 4 0 Figure 34.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 35. Pentium® II Processor Substrate (S.E.C.C.2 Package), Edge Finger Contact Dimensions OLGA Package Figure 36. Pentium® II Processor Markings (S.E.C.C.2 Package) 2-D Matrix Mark iCOMP® 2.0 index=YYY SZNNN/XYZ ORDER CODE Se e N ote XXXXXXXX-NNNN C Dynamic Mark Area A B pentium P 56 R O C E S S O ® R II Hologram Location NOTE: Please refer to the Pentium® II Processor Specification Update for this information.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 32. Description Table for Processor Markings (S.E.C.C.2 Packaged Processor) Code Letter 5.3 Description A Logo B Product Name C Trademark D Logo E Product Name F Dynamic Mark Area – with 2-D matrix Processor Package Materials Information Both the the S.E.C.C. and S.E.C.C.2 processor cartridges are comprised of multiple pieces to make the complete assembly.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 5.4 Pentium® II Processor Signal Listing Table 35 and Table 36 provide the processor edge finger and Pentium II processor connector signal definitions for Pentium II processors. The signal locations on the SC 242 edge connector are to be used for signal routing, simulation, and component placement on the motherboard. Table 35 is the Pentium II processor substrate edge finger listing in order by pin number. Table 35.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 35. Signal Listing in Order by Pin Number (Sheet 2 of 4) Pin No. Datasheet Pin Name Signal Buffer Type Pin No.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 35. Signal Listing in Order by Pin Number (Sheet 3 of 4) Pin No. 60 Pin Name Signal Buffer Type Pin No.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 35. Signal Listing in Order by Pin Number (Sheet 4 of 4) Pin No. Pin Name Signal Buffer Type Pin No.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 36. Signal Listing in Order by Signal Name (Sheet 2 of 4) Pin No. 62 Pin Name Signal Buffer Type Pin No.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 36. Signal Listing in Order by Signal Name (Sheet 3 of 4) Pin No. Datasheet Pin Name Signal Buffer Type Pin No.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 36. Signal Listing in Order by Signal Name (Sheet 4 of 4) Pin No. Pin Name Signal Buffer Type Pin No.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz processor in the Single Edge Contact Cartridge (S.E.C.C.) package in its retention mechanism with heatsink supports installed. Figure 38 shows a mechanical representation of a boxed Pentium II processor in the S.E.C.C.2 package. Note: The airflow of the fan heatsink is into the center and out of the sides of the fan heatsink. The large arrows in Figure 37 denote the direction of airflow. Figure 37. Boxed Pentium® II Processor in the S.E.C.C.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 6.2 Mechanical Specifications This section documents the mechanical specifications of the boxed Pentium II processor fan heatsinks. Motherboard manufacturers and system designers should take into account the spacial requirement for both the boxed Pentium II processor in the S.E.C.C. package and the boxed Pentium II processor in the S.E.C.C.2 package. 6.2.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 40. Front View Space Requirements for the Boxed Processor with S.E.C.C. Packaging Figure 41. Side View Space Requirements for the Boxed Processor with S.E.C.C.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 42. Front View Space Requirements for the Boxed Processor with S.E.C.C.2 Packaging Figure 43.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 37. Boxed Processor Fan Heatsink Spatial Dimensions Fig. Ref. Label Refers to Figure A Figure 39 S.E.C.C. Fan Heatsink Depth (off processor extended thermal plate) B Figure 39 S.E.C.C. Fan Heatsink Height Above Motherboard C Figure 40 D Dimensions (Inches) Min Typ Max - 1.1 1.3 Note 1 0.5 - S.E.C.C. Fan Heatsink Height - 2.1 2.2 Figure 40 S.E.C.C. Fan Heatsink Width (plastic shroud only) - 4.8 4.9 E Figure 40 S.E.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 44. Heatsink Support Hole Locations and Size Any motherboard components placed in the area beneath the fan heatsink supports must recognize the clearance given in Table 38. Component height restrictions for passive heatsink support designs, as described in AP-588, Mechanical and Assembly Technology for S.E.C. Cartridge Processors (Order Number 243333), still apply.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 45. Side View Space Requirements for Boxed Processor Fan Heatsink Supports Figure 46.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 6.3 Boxed Processor Requirements 6.3.1 Fan Heatsink Power Supply The boxed processor's fan heatsink requires a +12 V power supply. A fan power cable will be shipped with the boxed processor to draw power from a power header on the motherboard. The power cable connector and pinout are shown in Figure 47. Motherboards must provide a matched power header to support the boxed processor.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Figure 48. Recommended Motherboard Power Header Placement Relative to Fan Power Connector and Pentium® II Processor Table 40. Motherboard Fan Power Connector Location Fig. Ref. Labels 6.4 Dimensions (Inches) Min Typ V Aproximate perpendicular distance of the fan power connector from the center of the 242-contact slot connector 1.44 W Aproximate parallel distance of the fan power connector from the edge of the 242-contact slot connector 1.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz 7.0 Pentium® II Processor Signal Description This section provides an alphabetical listing of all Pentium II processor signals. The tables at the end of this section summarize the signals by direction: output, input, and I/O. 7.1 Alphabetical Signals Reference Table 41. Signal Description (Sheet 1 of 8) Name Type Description This bidirectional signal is used to select the system bus frequency.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 41. Signal Description (Sheet 2 of 8) Name Type Description If the A20M# (Address-20 Mask) input signal is asserted, the Pentium II processor masks physical address bit 20 (A20#) before looking up a line in any internal cache and before driving a read/write transaction on the bus. Asserting A20M# emulates the 8086 processor's address wrap-around at the 1-Mbyte boundary. Assertion of A20M# is only supported in real mode.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 41. Signal Description (Sheet 3 of 8) Name Type Description The BINIT# (Bus Initialization) signal may be observed and driven by all Pentium II processor system bus agents, and if used must connect the appropriate pins of all such agents. If the BINIT# driver is enabled during power on configuration, BINIT# is asserted to signal any bus condition that prevents reliable future information.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 41. Signal Description (Sheet 4 of 8) Name DBSY# DEFER# DEP[7:0]# DRDY# EMI FERR# Type Description I/O The DBSY# (Data Bus Busy) signal is asserted by the agent responsible for driving data on the Pentium II processor system bus to indicate that the data bus is in use. The data bus is released after DBSY# is deasserted. This signal must connect the appropriate pins on all Pentium II processor system bus agents.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 41. Signal Description (Sheet 5 of 8) Name Type Description The IGNNE# (Ignore Numeric Error) signal is asserted to force the processor to ignore a numeric error and continue to execute noncontrol floating-point instructions. If IGNNE# is deasserted, the processor generates an exception on a noncontrol floating-point instruction if a previous floating-point instruction caused an error.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 41. Signal Description (Sheet 6 of 8) Name Type Description The PWRGOOD (Power Good) signal is a 2.5 V tolerant processor input. The processor requires this signal to be a clean indication that the clocks and power supplies (VCCCORE, etc.) are stable and within their specifications.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 41. Signal Description (Sheet 7 of 8) Name RSP# Type Description I The RSP# (Response Parity) signal is driven by the response agent (the agent responsible for completion of the current transaction) during assertion of RS[2:0]#, the signals for which RSP# provides parity protection. It must connect the appropriate pins of all Pentium II processor system bus agents.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 41. Signal Description (Sheet 8 of 8) Name Type Description THERMTRIP# O The processor protects itself from catastrophic overheating by use of an internal thermal sensor. This sensor is set well above the normal operating temperature to ensure that there are no false trips. The processor will stop all execution when the junction temperature exceeds approximately 135 °C. This is signaled to the system by the THERMTRIP# (Thermal Trip) pin.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 43.
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Pentium® II Processor at 350 MHz, 400 MHz, and 450 MHz Table 44.
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