User Manual

Appendix C: Status model Series 2200 Programmable DC Power Supplies Reference Manual
C-8 2200S-901-01 Rev. A/November 2011
Operation enable register (OENR)
The OENR consists of bits defined exactly the same as bits 0 through 7 in the OEVR. You can use
this register to control whether or not the operation status bit (OSB) in the SBR is set when an event
occurs and the corresponding OEVR bit is set.
Use the STATus:OPERation:ENABle command to set the bits in the OENR.
Use the STATus:OPERation:ENABle? query to read the contents of the OENR.
Figure 32: Operation enable register (OENR)
Questionable enable register (QENR)
The QENR consists of bits defined exactly the same as bits 0 through 7 in the QEVR register. You
can use this register to control whether the QSB in the SBR is set when an event occurs and the
corresponding QEVR bit is set.
Use the STATus:QUEStionable:ENABle command to set the bits in the QENR.
Use the STATus:QUEStionable:ENABle? query to read the contents of the QENR.
Figure 33: Questionable enable register (QENR)
*PSC Command
The *PSC command controls the enable registers contents at power-on. Sending *PSC 1 sets the
enable registers at power on as follows:
 ESER 0 (equivalent to an *ESE 0 command)
 SRER 0 (equivalent to an *SRE 0 command)
Sending *PSC 0 lets the enable registers maintain their values in nonvolatile memory through a
power cycle.
Queues
Output queue
The power supply stores query responses in the Output Queue and empties this queue each time it
receives a new command or query message after an <EOM>. The controller must read a query
response before it sends the next command (or query) or it will lose responses to earlier queries.