Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsIntegrated Circuits (ICs)Timer IC t- real time clock Clock/calendar EDIP 28

1 of 16

19-5502; Rev 6/13

FEATURES

 Integrated NV SRAM, Real-Time Clock,

Crystal, Power-Fail Control Circuit, and

Lithium Energy Source

 Clock Registers are Accessed Identically to

the Static RAM. These Registers are Resident

in the Eight Top RAM Locations.

 Century Byte Register (i.e., Y2K Compliant)

 Totally Nonvolatile with Over 10 Years of

Operation in the Absence of Power

 BCD-Coded Century, Year, Month, Date,

Day, Hours, Minutes, and Seconds with

Automatic Leap-Year Compensation Valid

Up to the Year 2100

 Battery Voltage-Level Indicator Flag

 Power-Fail Write Protection Allows for ±10%

Power-Supply Tolerance

 Lithium Energy Source is Electrically

Disconnected to Retain Freshness Until

Power is Applied for the First Time

 DIP Module Only

Standard JEDEC Byte-Wide 32k x 8 Static

RAM Pinout

 PowerCap Module Board Only

Surface-Mountable Package for Direct

Connection to PowerCap Containing

Battery and Crystal

Replaceable Battery (PowerCap)

Power-On Reset Output

Pin-for-Pin Compatible with Other Densities

of DS174xP Timekeeping RAM

 Also Available in Industrial Temperature

Range: -40°C to +85°C

 UL Recognized

PIN CONFIGURATIONS

N.C.

RST

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

N.C.

A14

A13

A12

A11

A10

N.C.

GND

BAT

PowerCap MODULE BOARD

(Uses DS9034PCX+ or DS9034I-PCX+ PowerCap)

DS1744P

TOP VIEW

A13

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3

A14

A12

DQ0

DQ1

DQ2

GND

DS1744

EDIP

DS1744/DS1744P

Y2K-

Compliant, Nonvolatile Timekeeping RAMs

Summary of content (16 pages)

PAGE 1
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs FEATURES             Integrated NV SRAM, Real-Time Clock, Crystal, Power-Fail Control Circuit, and Lithium Energy Source Clock Registers are Accessed Identically to the Static RAM. These Registers are Resident in the Eight Top RAM Locations. Century Byte Register (i.e.
PAGE 2
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs PIN DESCRIPTION EDIP 1 2 3 4 5 6 7 8 9 10 21 23 24 25 26 11 12 13 15 16 17 18 19 14 20 PIN PowerCap 32 30 25 24 23 22 21 20 19 18 28 29 27 26 31 16 15 14 13 12 11 10 9 17 8 22 7 OE Active-Low Output-Enable Input 27 28 6 5 WE VCC — 4 RST — 1, 2, 3, 33, 34 Active-Low Write-Enable Input Power-Supply Input Active-Low Reset Output, Open Drain. Requires a pullup resistor for proper operation. N.C.
PAGE 3
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs ORDERING INFORMATION VOLTAGE (V) DS1744-70+ 5.0 DS1744-70IND+ 5.0 DS1744W-120+ 3.3 DS1744W-120IND+ 3.3 DS1744P-70+ 5.0 DS1744P-70IND+ 5.0 DS1744WP-120+ 3.3 DS1744WP-120IND+ 3.
PAGE 4
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs Figure 1. DS1744/DS1744P Block Diagram DS1744/DS1744P PACKAGES The DS1744 is available in two packages (28-pin encapsulated DIP and 34-pin PowerCap module). The 28-pin EDIP module integrates the crystal, lithium energy source, and silicon all in one package. The 34pin PowerCap module board is designed with contacts for connection to a separate PowerCap (DS9034PCX) that contains the crystal and battery.
PAGE 5
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs Table 1. Truth Table CE VCC VIH VIL VCC > VPF VIL VIL VSO < VCC < VPF X VCC < VSO < VPF X OE X X VIL VIH X X WE X VIL VIH VIH X X MODE Deselect Write Read Read Deselect Deselect DQ High-Z Data In Data Out High-Z High-Z High-Z POWER Standby Active Active Active CMOS Standby Data-Retention Mode SETTING THE CLOCK As shown in Table 2, bit 7 of the Control register is the W (write) bit.
PAGE 6
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs CLOCK ACCURACY (PowerCap MODULE) The DS1744 and DS9034PCX are individually tested for accuracy. Once mounted together, the module typically keeps time accuracy to within ±1.53 minutes per month (35ppm) at +25°C. Clock accuracy is also affected by the electrical environment and caution should be taken to place the RTC in the lowestlevel EMI section of the PC board layout.
PAGE 7
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs DATA-RETENTION MODE The 5V device is fully accessible and data can be written or read only when VCC is greater than VPF. However, when VCC is below the power-fail point, VPF (point at which write protection occurs), the internal clock registers and SRAM are blocked from any access. At this time the power-fail reset-output signal ( RST ) is driven active and remains active until VCC returns to nominal levels.
PAGE 8
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground 5.5V Version…………………………..………………………………..…………………………...-0.3V to +6.0V 3.3V Version………………………………………………………………………………………...-0.3V to +4.6V Storage Temperature Range EDIP..........................……………………..………………………………………………………...-40°C to +85°C PowerCap..................……………………..……………………………………………………….-55°C to +125°C Lead Temperature (soldering, 10s)………......................................
PAGE 9
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs DC ELECTRICAL CHARACTERISTICS (VCC = 3.3V ±10%, TA = Over the operating range.) PARAMETER Active Supply Current TTL Standby Current ( CE = VIH) CMOS Standby Current ( CE ≥ VCC - 0.2V) Input Leakage Current (Any Input) Output Leakage Current (Any Output) Output Logic 1 Voltage (IOUT = -1.0mA) Output Logic 0 Voltage (IOUT = +2.
PAGE 10
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs AC CHARACTERISTICS—READ CYCLE (3.3V) (VCC = 3.3V ±10%, TA = Over the operating range.
PAGE 11
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs AC CHARACTERISTICS—WRITE CYCLE (5V) (VCC = 5.0V ±10%, TA = Over the operating range.
PAGE 12
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs WRITE CYCLE TIMING DIAGRAM, WRITE-ENABLE CONTROLLED WRITE CYCLE TIMING DIAGRAM, CHIP-ENABLE CONTROLLED 12 of 16
PAGE 13
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs POWER-UP/DOWN AC CHARACTERISTICS (5V) (VCC = 5.0V ±10%, TA = Over the operating range.
PAGE 14
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs POWER-UP/DOWN CHARACTERISTICS (3.3V) (VCC = 3.3V ±10%, TA = Over the operating range.) PARAMETER SYMBOL MIN TYP MAX CE or WE at VIH, Before PowerDown tPD 0 µs VCC Fall Time: VPF(MAX) to VPF(MIN) tF 300 µs VCC Rise Time: VPF(MIN) to VPF(MAX) tR 0 µs tREC VPF to RST High Expected Data-Retention Time (Oscillator ON) UNITS 35 tDR 10 NOTES ms years 5, 6 POWER-UP/DOWN WAVEFORM TIMING (3.
PAGE 15
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs AC TEST CONDITIONS Output Load: 50pF + 1TTL Gate Input Pulse Levels: 0 to 3.0V Timing Measurement Reference Levels: Input: 1.5V Output: 1.5V Input Pulse Rise and Fall Times: 5ns NOTES: 1) Voltages are referenced to ground. 2) Typical values are at +25°C and nominal supplies. 3) Outputs are open. 4) Battery switchover occurs at the lower of either the battery terminal voltage or VPF. 5) Data-retention time is at +25°C.
PAGE 16
DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs REVISION HISTORY REVISION DATE DESCRIPTION 3/12 Updated the Ordering Information table to include only lead-free parts; updated the Absolute Maximum Ratings section to include the storage temperature range and lead and soldering temperatures for EDIP and PowerCap packages; added Note 10 to the ICC parameter in the DC Electrical Characteristics tables (for 5.0V and 3.