Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - Digital potentiometer linear Non-permanent PDIP 20

1 of 14 053105

FEATURES

§ Four independent, digitally controlled 64-

position potentiometers

§ Two interface control options

- 5-wire serial

- 2-wire addressable

§ Standard resistance values

- DS1844-010 10 kW

- DS1844-050 50 kW

- DS1844-100 100 kW

§ Mixed resistor value combinations (contact

factory for availability)

§ Operating Temperature Range

- Industrial: -40°C to +85°C

PIN ASSIGNMENT

PIN DESCRIPTION

- 2.7V to 5.5V

PS - Port Select

A0, A1, A2 - Device Select Pins (2-Wire)

SDA - Serial Data I/O (2-Wire)

SCL - Serial Clock (2-Wire)

R/ W - Read/Write enable (5-Wire)

RST - Serial Port Reset Input (5-Wire)

- Serial Port Data Input (5-Wire)

CLK - Serial Port Clock Input (5-Wire)

OUT

- Cascade Data Output (5-Wire)

-H

- High-end Terminal of Pot

-L

- Low-end Terminal of Pot

-W

- Wiper Terminal of Pot

GND - Ground

DESCRIPTION

The DS1844 Quad Digital Potentiometer is a four-channel, digitally controlled linear potentiometer. Each

potentiometer is comprised of 63 equi-resistive sections and has three terminals accessible to the user.

These include the high side terminals, H

, the wiper terminals, W

, and the low-side terminals, L

The

wiper position on the resistor ladder is selected via an 8-bit register value. Communication and control of

the device are supported by two types of serial interface. These include a 5-wire I/O shift register

interface and a 2-wire addressable interface.

DS1844

Quad Digital Potentiomete

www.maxim-ic.com

Device Description

PS 1 20 V

H2 2 19 H1

H3 3 18 H0

W3 4 17 W0

L3 5 16 L0

L2 6 15 L1

W2 7 14 W1

R/W, A0 8 13 SCL, CLK

A2, RST 9 12 SDA, D

GND 10 11 A1, D

OUT

20-Pin DIP (300-mil)

20-Pin SOIC (300-mil)

20-Pin TSSOP (173-mil)

Summary of content (14 pages)

PAGE 1
DS1844 Quad Digital Potentiometer www.maxim-ic.
PAGE 2
DS1844 The DS1844 is available in standard 10 kW, 50 kW, and 100 kW versions. Mixed resistor combinations are also available through custom setups. The DS1844 is specified to operate over the industrial temperature range: -40°C to +85°C. Packages for the DS1844 include 20-pin DIPs, SOICs, and TSSOPs. OPERATION The DS1844 contains four 64-position potentiometers. Each potentiometer is independent and has three accessible terminals, which include HX, LX, and WX.
PAGE 3
DS1844 When writing data, the R/ W input should be in a low state. Once RST has activated the port, a data bit is latched (or valid) on the low-to-high transition of the CLK signal. Once, eight low-to-high transitions have occurred on the CLK input, the associated 8-bit data block will be loaded as the wiper’s value on the falling edge of the eighth clock pulse. Potentiometer wiper values can be loaded in any order. Also, potentiometer wiper data can be loaded 1, 2, 3, or 4 bytes at a time.
PAGE 4
DS1844 Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. The data on the line can be changed during the LOW period of the clock signal. There is one clock pulse per bit of data. Figure 4 details how data transfer is accomplished on the two-wire bus. Depending upon the state of the R/W bit, two types of data transfer are possible.
PAGE 5
DS1844 SLAVE ADDRESS A command/control byte is the 1st byte received following the START condition from the master device. The command/control byte consists of a 4-bit control code. For the DS1844, this is set as 0101 binary for read/write operations. The next 3 bits of the command/ control byte are the device select bits or slave address (A2, A1, A0). They are used by the master device to select which of eight devices is to be accessed.
PAGE 6
DS1844 0 for writing the DS1844. Once the command/control byte has been issued and the master receives the acknowledgment from the DS1844, potentiometer wiper data is transmitted to the DS1844 by the master device. As in the case of the 5-wire serial protocol, a data byte for the DS1844 will contain potentiometer select data and wiper position value. The six least significant bits of data specify the wiper position value while the two most significant bits specify the potentiometer to be loaded.
PAGE 7
DS1844 ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature -1.0V to +7.0V -40°C to +85°C -55°C to +125°C 260°C for 10 seconds * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
PAGE 8
DS1844 ANALOG RESISTOR CHARACTERISTICS (-40°C to +85°C; VCC=2.7V to 5.5V) PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES End-to-End Resistor Tolerance -20 +20 % 25 Absolute Linearity -0.5 +0.5 LSB 16 Relative Linearity -0.25 +0.25 LSB 17 kHz 13 ppm/°C 18 -3dB Cutoff frequency fcutoff Temperature Coefficent 750 2-WIRE ADDRESSABLE INTERFACE AC ELECTRICAL CHARACTERISTICS PARAMETER Port Select Setup SYMBOL CONDITION (-40°C to +85°C; VCC=2.7V to 5.
PAGE 9
DS1844 5-WIRE SERIAL INTERFACE AC ELECTRICAL CHARACTERISTICS PARAMETER (-40°C to +85°C; VCC=2.7V to 5.
PAGE 10
DS1844 11. Address Inputs, A0, A1, and A2, should be tied to either VCC or GND depending on the desired address selections. 12. Resistor inputs cannot go below GND by more than 0.5 volts or above VCC by more than 0.5 volts. 13. -3dB cutoff frequency characteristics for the DS1844 depend on potentiometer total resistance: DS1844-010; 1 MHz; DS1844-050; 200 kHz; DS1844-100; 100 kHz. 14. See Figure 3, 5-wire timing diagram. 15. For 5-wire control logic and VCC = 5V ±10%, maximum VIL = +0.8V.
PAGE 11
DS1844 DS1844 BLOCK DIAGRAM Figure 1 WIPER REGISTER CONFIGURATION Figure 2 11 of 14
PAGE 12
DS1844 5-WIRE SERIAL TIMING DIAGRAM Figure 3 (A), (B) (A) WRITING DATA TO THE DS1844 12 of 14
PAGE 13
DS1844 2-WIRE DATA TRANSFER OVERVIEW Figure 4 START COMMAND/CONTROL BYTE Figure 5 2-WIRE READ PROTOCOL Figure 6 2-WIRE WRITE PROTOCOLS Figure 7 13 of 14
PAGE 14
DS1844 2-WIRE TIMING DIAGRAM Figure 8 DIGITAL OUTPUT LOAD Figure 9 14 of 14