Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - AD converter (ADC) External , Internal SSOP 20

General Description

The MAX1112/MAX1113 low-power, 8-bit, 8-channel

analog-to-digital converters (ADCs) feature an internal

track/hold, voltage reference, clock, and serial inter-

face. They operate from a single 4.5V to 5.5V supply

and consume only 135µA while sampling at rates up to

50ksps. The MAX1112’s 8 analog inputs and the

MAX1113’s 4 analog inputs are software-configurable,

allowing unipolar/bipolar and single-ended/differential

operation.

Successive-approximation conversions are performed

using either the internal clock or an external serial-inter-

face clock. The full-scale analog input range is deter-

mined by the 4.096V internal reference, or by an

externally applied reference ranging from 1V to V

The 4-wire serial interface is compatible with the SPI™,

QSPI™, and MICROWIRE™ serial-interface standards.

A serial-strobe output provides the end-of-conversion

signal for interrupt-driven processors.

The MAX1112/MAX1113 have a software-program-

mable, 2µA automatic power-down mode to minimize

power consumption. Using power-down, the supply

current is reduced to 13µA at 1ksps, and only 82µA at

10ksps. Power-down can also be controlled using the

SHDN input pin. Accessing the serial interface automat-

ically powers up the device.

The MAX1112 is available in a 20-pin SSOP package.

The MAX1113 is available in a small 16-pin QSOP

package.

________________________Applications

Portable Data Logging

Hand-Held Measurement Devices

Medical Instruments

System Diagnostics

Solar-Powered Remote Systems

4mA to 20mA-Powered Remote

Data-Acquisition Systems

____________________________Features

♦ 4.5V to 5.5V Single Supply

♦ Low Power: 135µA at 50ksps

13µA at 1ksps

♦ 8-Channel Single-Ended or 4-Channel Differential

Inputs (MAX1112)

♦ 4-Channel Single-Ended or 2-Channel Differential

Inputs (MAX1113)

♦ Internal Track/Hold; 50kHz Sampling Rate

♦ Internal 4.096V Reference

♦ SPI/QSPI/MICROWIRE-Compatible Serial Interface

♦ Software-Configurable Unipolar or Bipolar Inputs

♦ Total Unadjusted Error: ±1 LSB (max)

±0.3 LSB (typ)

MAX1112/MAX1113

+5V, Low-Power, Multi-Channel,

Serial 8-Bit ADCs

________________________________________________________________ Maxim Integrated Products 1

INPUT

SHIFT

CONTROL

LOGIC

INT

CLOCK

OUTPUT

SHIFT

+4.096V

REFERENCE

T/H

ANALOG

INPUT

MUX

8-BIT

SAR ADC

DOUT

SSTRB

DGND

AGND

SCLK

DIN

CH0

CH1

CH3

CH2

CH7*

CH6*

CH5*

CH4*

COM

REFOUT

*MAX1112 ONLY

REFIN

OUT

REF

CLOCK

MAX1112

MAX1113

SHDN

Functional Diagram

19-1231; Rev 2; 4/11

EVALUATION KIT

AVAILABLE

Ordering Information continued at end of data sheet.

Pin Configurations appear at end of data sheet.

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

Summary of content (20 pages)

PAGE 1
9-1231; Rev 2; 4/11 KIT ATION EVALU E L B AVAILA +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs The MAX1112/MAX1113 low-power, 8-bit, 8-channel analog-to-digital converters (ADCs) feature an internal track/hold, voltage reference, clock, and serial interface. They operate from a single 4.5V to 5.5V supply and consume only 135µA while sampling at rates up to 50ksps.
PAGE 2
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs ABSOLUTE MAXIMUM RATINGS VDD to AGND............................................................-0.3V to +6V AGND to DGND.....................................................-0.3V to +0.3V CH0–CH7, COM, REFIN, REFOUT to AGND ...................................-0.3V to (VDD + 0.3V) Digital Inputs to DGND.............................................-0.3V to +6V Digital Outputs to DGND ............................-0.3V to (VDD + 0.
PAGE 3
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs (VDD = 4.5V to 5.5V; unipolar input mode; VCOM = 0V; fSCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion cycle (50ksps); 1µF capacitor at REFOUT; TA = TMIN to TMAX; unless otherwise noted.
PAGE 4
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs ELECTRICAL CHARACTERISTICS (continued) (VDD = 4.5V to 5.5V; unipolar input mode; VCOM = 0V; fSCLK = 500kHz, external clock (50% duty cycle); 10 clocks/conversion cycle (50ksps); 1µF capacitor at REFOUT; TA = TMIN to TMAX; unless otherwise noted.
PAGE 5
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs MAX1112/MAX1113 TIMING CHARACTERISTICS (Figures 8 and 9) (VDD = 4.5V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.
PAGE 6
__________________________________________Typical Operating Characteristics (VDD = 5.0V; fSCLK = 500kHz; external clock (50% duty cycle); RL = ∞; TA = +25°C, unless otherwise noted.) SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE 140 VDD = 4.5V 120 MAX1112/13-02 0.3 8 0.2 0.1 6 4 -0.1 2 -0.2 0 100 -60 -20 20 60 100 -0.3 -60 140 -20 20 60 100 TEMPERATURE (°C) TEMPERATURE (°C) OFFSET ERROR vs. TEMPERATURE INTEGRAL NONLINEARITY vs. CODE 0.5 140 0 64 128 192 256 DIGITAL CODE 0.
PAGE 7
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs PIN NAME FUNCTION MAX1112 MAX1113 1–4 1–4 CH0–CH3 Sampling Analog Inputs 5–8 — CH4–CH7 Sampling Analog Inputs 9 5 COM Ground Reference for Analog Inputs. Sets zero-code voltage in single-ended mode. Must be stable to ±0.5 LSB. 10 6 SHDN Three-Level Shutdown Input. Normally high impedance. Pulling SHDN low shuts the MAX1112/MAX1113 down to 10µA (max) supply current; otherwise, the devices are fully operational.
PAGE 8
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs _______________Detailed Description The MAX1112/MAX1113 analog-to-digital converters (ADCs) use a successive-approximation conversion technique and input track/hold (T/H) circuitry to convert an analog signal to an 8-bit digital output. A flexible serial interface provides easy interface to microprocessors (µPs). Figure 3 shows the Typical Operating Circuit.
PAGE 9
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs MAX1112/MAX1113 Table 1a. MAX1112 Channel Selection in Single-Ended Mode (SGL/DIF = 1) SEL2 SEL1 SEL0 CH0 0 0 0 + 1 0 0 0 0 1 1 0 1 0 1 0 1 1 0 0 1 1 1 1 1 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM – + – + – + – + – + – + – + – Table 1b.
PAGE 10
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs The time required for the T/H to acquire an input signal is a function of how quickly its input capacitance is charged. If the input signal’s source impedance is high, the acquisition time lengthens, and more time must be allowed between conversions. The acquisition time, tACQ, is the minimum time needed for the signal to be acquired. It is calculated by: tACQ = 6 x (RS + RIN) x 18pF where RIN = 6.
PAGE 11
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs UNIPOLAR MODE BIPOLAR MODE Full Scale Zero Scale Positive Full Scale Zero Scale Negative Full Scale VREFIN + COM COM +VREFIN/2 + COM COM -VREFIN/2 + COM in control bytes of $FF (hex), which trigger singleended, unipolar conversions on CH7 (MAX1112) or CH3 (MAX1113) in external clock mode without powering down between conversions.
PAGE 12
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs MAX1112/MAX1113 8-bit conversion result). Figure 6 shows the MAX1112/ MAX1113 common serial-interface connections. I/O CS SCK Simple Software Interface Make sure the CPU’s serial interface runs in master mode so the CPU generates the serial clock. Choose a clock frequency from 50kHz to 500kHz. SCLK MISO DOUT +5V MAX1112 MAX1113 1) Set up the control byte for external clock mode and call it TB1.
PAGE 13
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs Clock Modes The MAX1112/MAX1113 can use either an external serial clock or the internal clock to perform the successiveapproximation conversion. In both clock modes, the external clock shifts data in and out of the devices. Bit PD0 of the control byte programs the clock mode. Figures 8–11 show the timing characteristics common to both modes.
PAGE 14
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs CS SCLK DIN 1 2 3 4 5 SEL2 SEL1 SEL0 UNI/ BIP 7 8 SGL/ PD1 DIF PD0 6 9 10 11 12 15 16 17 18 START SSTRB tCONV DOUT A/D STATE B7 B6 B1 B0 FILLED WITH ZEROS CONVERSION 25µs TYP IDLE IDLE tACQ 4µs (fSCLK = 500kHz) Figure 10. Internal Clock Mode Timing CS tCONV tCSS tSCK tCSH SSTRB tSSTRB SCLK PD0 CLOCK IN NOTE: FOR BEST NOISE PERFORMANCE, KEEP SCLK LOW DURING CONVERSION. Figure 11.
PAGE 15
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs MAX1112/MAX1113 CS 1 8 10 1 8 10 1 8 10 1 SCLK S DIN CONTROL BYTE 0 S B7 DOUT S CONTROL BYTE 1 B0 B7 B0 CONVERSION RESULT 1 CONVERSION RESULT 0 S CONTROL BYTE 2 CONTROL BYTE 3 B7 CONVERSION RESULT 2 SSTRB Figure 12a. Continuous Conversions, External Clock Mode, 10 Clocks/Conversion Timing CS SCLK DIN DOUT S S CONTROL BYTE 0 B7 CONTROL BYTE 1 B0 CONVERSION RESULT 0 B7 CONVERSION RESULT 1 Figure 12b.
PAGE 16
__________Applications Information Power-On Reset When power is first applied, and if SHDN is not pulled low, internal power-on reset circuitry activates the MAX1112/MAX1113 in internal clock mode. SSTRB is high on power-up and, if CS is low, the first logical 1 on DIN is interpreted as a start bit. Until a conversion takes place, DOUT shifts out zeros. No conversions should be performed until the reference voltage has stabilized (see the Wakeup Time specifications in the Timing Characteristics).
PAGE 17
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs INTERNAL EXTERNAL MAX1112/MAX1113 CLOCK MODE EXTERNAL SHDN SETS POWERDOWN MODE SETS EXTERNAL CLOCK MODE DIN S X X X X X 1 1 S X X X X X 0 1 S X X X X X 1 1 DATA VALID DATA VALID DOUT DATA INVALID POWERDOWN POWERED UP MODE SETS EXTERNAL CLOCK MODE POWERED UP POWERDOWN POWERED UP Figure 14a.
PAGE 18
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs OUTPUT CODE FULL-SCALE TRANSITION 11111111 SUPPLIES 11111110 +5V GND 11111101 FS = VREFIN + COM V 1 LSB = REFIN 256 00000011 R* = 10Ω VDD 00000010 AGND DGND +5V DGND 00000001 00000000 0 1 2 (COM) 3 MAX1112 MAX1113 FS INPUT VOLTAGE (LSB) FS - 1 LSB DIGITAL CIRCUITRY *OPTIONAL Figure 17. Power-Supply Grounding Connections Figure 15.
PAGE 19
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs TOP VIEW CH0 1 20 VDD CH1 2 19 SCLK CH0 1 16 VDD CH2 3 18 CS CH1 2 15 SCLK 17 DIN CH2 3 16 SSTRB CH3 4 CH3 4 MAX1112 CH4 5 14 CS MAX1113 13 DIN 15 DOUT COM 5 12 SSTRB CH6 7 14 DGND SHDN 6 11 DOUT CH7 13 AGND REFIN 7 10 DGND CH5 6 8 COM 9 REFOUT 8 12 REFOUT SHDN 10 9 11 REFIN AGND QSOP SSOP Ordering Information ___________________Chip Information PIN-PACKAGE PROCESS:CMOS 0°C to +70°C 20 SSOP SUBSTRATE CONNECTED
PAGE 20
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs Revision History REVISION NUMBER REVISION DATE 0 6/97 Initial release 4/11 Updated General Description, Features, Ordering Information, Absolute Maximum Ratings, Electrical Characteristics, Timing Characteristics, Pin Description, Tables 3 and 4, 5, Power-Down, Software Power-Down, HardWired Power-Down, External Reference and Layout, Grounding, and Bypassing, and Chip Information sections.