Datasheet

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_______________

General Description

The MAX1248/MAX1249 10-bit data-acquisition sys-

tems combine a 4-channel multiplexer, high-bandwidth

track/hold, and serial interface with high conversion

speed and low power consumption. They operate from

a single +2.7V to +5.25V supply, and their analog

inputs are software configurable for unipolar/bipolar

and single-ended/differential operation.

The 4-wire serial interface connects directly to SPI™/

QSPI™ and MICROWIRE™ devices without external

logic. A serial strobe output allows direct connection

to TMS320-family digital signal processors. The

MAX1248/MAX1249 use either the internal clock or an

external serial-interface clock to perform successive-

approximation analog-to-digital conversions.

The MAX1248 has an internal 2.5V reference, while the

MAX1249 requires an external reference. Both parts

have a reference-buffer amplifier with a ±1.5% voltage

adjustment range.

These devices provide a hard-wired SHDN pin and a

software-selectable power-down, and can be pro-

grammed to automatically shut down at the end of a

conversion. Accessing the serial interface automatically

powers up the MAX1248/MAX1249, and the quick

turn-on time allows them to be shut down between all

conversions. This technique can cut supply current to

under 60µA at reduced sampling rates.

The MAX1248/MAX1249 are available in a 16-pin DIP

and a very small QSOP that occupies the same board

area as an 8-pin SO.

For 8-channel versions of these devices, see the

MAX148/MAX149 data sheet.

________________________Applications

Portable Data Logging Data Acquisition

Medical Instruments Battery-Powered Instruments

Pen Digitizers System Supervision

____________________________Features

♦ 4-Channel Single-Ended or 2-Channel

Differential Inputs

♦ Single +2.7V to +5.25V Operation

♦ Internal 2.5V Reference (MAX1248)

♦ Low Power: 1.2mA (133ksps, +3V supply)

54µA (1ksps, +3V supply)

1µA (power-down mode)

♦ SPI/QSPI/MICROWIRE/TMS320-Compatible

4-Wire Serial Interface

♦ Software-Configurable Unipolar or Bipolar Inputs

♦ 16-Pin QSOP Package (same area as 8-pin SO)

MAX1248/MAX1249

+2.7V to +5.25V, Low-Power, 4-Channel,

Serial 10-Bit ADCs in QSOP-16

________________________________________________________________

Maxim Integrated Products

19-1072; Rev 2; 5/98

PART

†

MAX1248ACPE

MAX1248BCPE

MAX1248ACEE 0°C to +70°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

16 Plastic DIP

16 QSOP

_____________

Ordering Information

Ordering Information continued at end of data sheet.

†

Contact factory for availability of alternate surface-mount

packages.

Pin Configuration appears at end of data sheet.

MAX1248BCEE 0°C to +70°C 16 QSOP

INL

(LSB)

±1/2

±1

±1/2

±1

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

I/O

SCK (SK)

MOSI (SO)

MISO (SI)

SHDN

SSTRB

DOUT

DIN

SCLK

COM

AGND

DGND

CH3

4.7µF

0.01µF

0.1µF

CH0

0V TO

+2.5V

ANALOG

INPUTS

MAX1248

CPU

+3V

VREF

REFADJ

__________Typical Operating Circuit

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.

For small orders, phone 408-737-7600 ext. 3468.

Summary of content (24 pages)

PAGE 1
9-1072; Rev 2; 5/98 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 ____________________________Features ♦ 4-Channel Single-Ended or 2-Channel Differential Inputs ♦ Single +2.7V to +5.25V Operation ♦ Internal 2.5V Reference (MAX1248) ♦ Low Power: 1.
PAGE 2
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 ABSOLUTE MAXIMUM RATINGS VDD to AGND, DGND .............................................. -0.3V to +6V AGND to DGND.................................................... -0.3V to +0.3V CH0–CH3, COM to AGND, DGND ............ -0.3V to (VDD + 0.3V) VREF to AGND........................................... -0.3V to (VDD + 0.3V) Digital Inputs to DGND............................................ -0.
PAGE 3
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 (VDD = +2.7V to +5.25V; COM = 0V; fSCLK = 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX1248—4.7µF capacitor at VREF pin; MAX1249—external reference, VREF = 2.500V applied to VREF pin; TA = TMIN to TMAX, unless otherwise noted.
PAGE 4
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.25V; COM = 0V; fSCLK = 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps); MAX1248—4.7µF capacitor at VREF pin; MAX1249—external reference; VREF = 2.500V applied to VREF pin, TA = TMIN to TMAX, unless otherwise noted.
PAGE 5
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 (VDD = +2.7V to +5.25V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER Acquisition Time SYMBOL CONDITIONS MIN tACQ 1.
PAGE 6
__________________________________________Typical Operating Characteristics (VDD = 3.0V, VREF = 2.500V, fSCLK = 2.0MHz, CLOAD = 20pF, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.25 CLOAD = 50pF MAX1249 1.00 CLOAD = 20pF 0.75 2.5 2.0 1.5 1.0 2.5000 0.5 3.25 3.75 4.25 4.75 0 2.25 5.25 2.75 3.25 3.75 SUPPLY VOLTAGE (V) SUPPLY CURRENT vs. TEMPERATURE SHUTDOWN CURRENT (µA) MAX1248 1.2 1.1 1.0 MAX1249 4.75 0.8 -60 -20 20 100 MAX1248-05 0.8 -20 20 60 0.
PAGE 7
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 PIN NAME FUNCTION 1 VDD Positive Supply Voltage 2–5 CH0–CH3 Sampling Analog Inputs 6 COM Ground reference for analog inputs. Sets zero-code voltage in single-ended mode. Must be stable to ±0.5LSB. 7 SHDN Three-Level Shutdown Input. Pulling SHDN low shuts the MAX1248/MAX1249 down; otherwise, the devices are fully operational. Pulling SHDN high puts the reference-buffer amplifier in internal compensation mode.
PAGE 8
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 _______________Detailed Description The MAX1248/MAX1249 analog-to-digital converters (ADCs) use a successive-approximation conversion technique and input track/hold (T/H) circuitry to convert an analog signal to a 10-bit digital output. A flexible serial interface provides easy interface to microprocessors (µPs). Figure 3 is a block diagram of the MAX1248/MAX1249.
PAGE 9
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 MAX1248/MAX1249 Table 1. Control-Byte Format BIT 7 (MSB) BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (LSB) START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0 BIT NAME DESCRIPTION 7(MSB) START The first logic “1” bit after CS goes low defines the beginning of the control byte. 6 5 4 SEL2 SEL1 SEL0 These three bits select which of the four channels are used for the conversion (Tables 2 and 3).
PAGE 10
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 DIF = 1) Table 2. Channel Selection in Single-Ended Mode (SGL/D SEL2 0 SEL1 0 SEL0 1 1 0 1 0 1 0 1 1 0 CH0 + CH1 CH2 CH3 COM – + – + – + – DIF = 0) Table 3.
PAGE 11
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 MAX1248/MAX1249 CS tACQ SCLK 1 DIN 4 8 SEL2 SEL1 SEL0 UNI/ SGL/ PD1 PD0 BIP DIF 12 16 20 24 START SSTRB B9 MSB A/D STATE RB3 RB2 RB1 DOUT B8 B7 B6 ACQUISITION 1.5µs IDLE B5 B4 B3 B2 B1 B0 LSB S1 CONVERSION S0 FILLED WITH ZEROS IDLE (fCLK = 2MHz) Figure 5.
PAGE 12
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 ••• CS ••• tSTR tSDV SSTRB ••• ••• tSSTRB SCLK tSSTRB •• • • •••• PD0 CLOCKED IN Figure 7. External Clock Mode SSTRB Detailed Timing CS SCLK 1 2 3 4 5 6 7 8 9 10 11 12 18 19 20 21 22 23 24 SGL/ SEL2 SEL1 SEL0 UNI/ BIP DIF PD1 PD0 DIN START SSTRB tCONV B9 MSB DOUT A/D STATE IDLE ACQUISITION 1.5µs CONVERSION 7.
PAGE 13
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 The first high bit clocked into DIN with CS low any time the converter is idle; e.g., after VDD is applied. OR The first high bit clocked into DIN after bit 3 of a conversion in progress is clocked onto the DOUT pin. If CS is toggled before the current conversion is complete, the next high bit clocked into DIN is recognized as a start bit; the current conversion is terminated, and a new one is started.
PAGE 14
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 CS 1 8 1 8 1 SCLK S DIN S CONTROL BYTE 0 DOUT S CONTROL BYTE 1 CONTROL BYTE 2 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 S1 S0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 S1 S0 CONVERSION RESULT 0 CONVERSION RESULT 1 SSTRB Figure 10a.
PAGE 15
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 REFERENCE BUFFER REFERENCE-BUFFER COMPENSATION MODE VREF CAPACITOR (µF) POWER-DOWN MODE POWER-UP DELAY (µs) MAXIMUM SAMPLING RATE (ksps) Enabled Internal — Fast 5 26 Enabled Internal — Full 300 26 Enabled External 4.7 Fast See Figure 13c 133 Enabled External 4.
PAGE 16
Table 5. Software Power-Down and Clock Mode PD1 PD0 DEVICE 0 0 Full Power-Down 0 1 Fast Power-Down 1 0 Internal Clock 1 1 External Clock 10,000 100 4 CHANNELS 10 Table 6. Hardware Power-Down and Internal Clock Frequency 1 CHANNEL 1 SHDN STATE DEVICE MODE REFERENCEBUFFER COMPENSATION INTERNAL CLOCK FREQUENCY 1 Enabled Internal 225kHz Floating Enabled External 1.
PAGE 17
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 10,000 RLOAD = ∞ CODE = 1010101000 10 AVERAGE SUPPLY CURRENT (µA) AVERAGE SUPPLY CURRENT (µA) MAX1248/MAX1249 100 4 CHANNELS RLOAD = ∞ CODE = 1010101000 1000 100 4 CHANNELS 1 CHANNEL 10 1 CHANNEL 1 1 0.01 0.1 1 10 100 1k 0.1 CONVERSION RATE (Hz) Lowest Power at Higher Throughputs Figure 13b shows the power consumption with external-reference compensation in fast power-down, with one and four channels converted.
PAGE 18
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 COMPLETE CONVERSION SEQUENCE 1.6ms WAIT DIN CH1 (ZEROS) 1 00 FULLPD 1 01 FASTPD (ZEROS) CH7 1 11 1 NOPD 00 1 FULLPD 01 FASTPD 1.21V REFADJ 0V 2.50V τ = RC = 20kΩ x CREFADJ VREF 0V tBUFFEN ≈ 75µs Figure 14.
PAGE 19
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 MAX1248/MAX1249 Table 7. Full Scale and Zero Scale UNIPOLAR MODE BIPOLAR MODE Full Scale Zero Scale VREF + COM COM Positive Zero Negative Full Scale Scale Full Scale VREF / 2 + COM COM -VREF / 2 + COM OUTPUT CODE 011 . . . 111 FS = VREF + COM 2 011 . . . 110 ZS = COM 000 . . . 010 000 . . . 001 000 . . . 000 SUPPLIES -VREF + COM 2 VREF 1LSB = 1024 -FS = +3V +3V GND +3V DGND R* = 10Ω 111 . . . 111 111 . . .
PAGE 20
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 +3V +3V 1µF 0.1µF ANALOG INPUTS +2.5V 1 VDD 2 CH0 SCLK 16 3 CS 15 MAX1248 CH1 MAX1249 DIN 14 4 CH2 SSTRB 13 5 CH3 DOUT 12 6 COM DGND 11 7 SHDN AGND 10 8 VREF REFADJ SCK PCS0 MC683XX MOSI MISO (GND) 9 CLOCK CONNECTIONS NOT SHOWN 0.1µF Figure 19.
PAGE 21
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 MAX1248/MAX1249 CS SCLK DIN START SEL2 SEL1 SEL0 UNI/BIP SGL/DIF PD1 PD0 HIGH IMPEDANCE SSTRB DOUT MSB B8 B0 LSB S1 S0 HIGH IMPEDANCE Figure 21.
PAGE 22
_________________Pin Configuration ___________________Chip Information TRANSISTOR COUNT: 2554 TOP VIEW VDD 1 16 SCLK CH0 2 15 CS 14 DIN CH1 3 CH2 4 CH3 5 MAX1248 MAX1249 13 SSTRB 12 DOUT COM 6 11 DGND SHDN 7 10 AGND VREF 8 9 REFADJ DIP/QSOP ________________________________________________________Package Information QSOP.EPS MAX1248/MAX1249 +2.7V to +5.
PAGE 23
+2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 PDIPN.EPS CDIPS.
PAGE 24
MAX1248/MAX1249 +2.7V to +5.25V, Low-Power, 4-Channel, Serial 10-Bit ADCs in QSOP-16 NOTES Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.