Datasheet

DS2430A
13 of 19
Master-to-Slave
For a Write-1 time slot, the voltage on the data line must have crossed the V
TH
threshold before the
Write-1 low time t
W1LMAX
is expired. For a Write-0 time slot, the voltage on the data line must stay below
the V
TH
threshold until the Write-0 low time t
W0LMIN
is expired. For the most reliable communication, the
voltage on the data line should not exceed V
ILMAX
during the entire t
W0L
or t
W1L
window. After the V
TH
threshold has been crossed, the DS2430A needs a recovery time t
REC
before it is ready for the next time
slot.
READ/WRITE TIMING DIAGRAM Figure 10
Write-1 Time Slot
Write-0 Time Slot
Read-data Time Slot
RESISTOR MASTER
t
REC
V
PUP
V
IHMASTER
V
TH
V
TL
V
ILMAX
0V
t
F
t
SLOT
t
W0L
ε
RESISTOR MASTER
V
PUP
V
IHMASTER
V
TH
V
TL
V
ILMAX
0V
t
F
t
SLOT
t
W1L
ε
RESISTOR MASTER DS2430A
t
REC
V
PUP
V
IHMASTER
V
TH
V
TL
V
ILMAX
0V
Master
Sampling
Window
δ
t
F
t
SLOT
t
RL
t
MSR
NOT RECOMMENDED FOR NEW DESIGNS