Datasheet

AR1000 SERIES RESISTIVE TOUCH SCREEN CONTROLLER
DS41393B-page 24 Preliminary  2009-2012 Microchip Technology Inc.
5.7 Timing – Bit Details
5.7.1 BIT RATE
The SPI standard does not specify a maximum data
rate for the serial bus. In general, SPI data rates can be
in MHz. Peripherals devices, such as the AR1021
controller, specify their own unique maximum SPI data
rates.
The maximum SPI bit rate for the AR1021 controller is
~900 kHz.
Characterization has been performed at bit rates of ~39
kHz and ~156 kHz.
5.7.2 INTER-BYTE DELAY
The AR1021 controller requires an inter-byte delay of
~50 us. This means the host should wait ~50 us
between the end of clocking a given byte and the start
of clocking the next byte.
5.7.3 BIT TIMING – DETAIL
Characterized timing details are shown below, in
Figure 5-4.
FIGURE 5-4: SPI BIT TIMING – DETAIL
TABLE 5-3: SPI BIT TIMING MIN. AND MAX. VALUES
Parameter Number
(1)
Parameter Description Min. Max. Units
10 SS↓ (select) to SCK↑ (initial) 500 — ns
11 SCK high 550 — ns
12 SCK low 550 — ns
13 SCK↓ (last) to SS↑ (deselect) 800 — ns
14 SDI setup before SCK↓ 100 — ns
15 SDI hold after SCK↓ 100 — ns
16 SDO valid after SCK↓ —150ns
17 SDO↑ rise — 50 ns
18 SDO↓ fall — 50 ns
19 SS↑ (deselect) to SDO High-z 10 50 ns
Note 1: Parameters are characterized, but not tested.