Stereo System User Manual

Parallel Host Interface
Host Interface (HI)
MOTOROLA DSP56012 User’s Manual 4-47
5. Assert HEN to enable the HI.
6. When HEN is deasserted, the data can be latched or read as appropriate if the
timing requirements have been observed.
7. HOREQ
will be deasserted if the operation is complete.
This transfer description is an overview. Specific and exact information for HI data
transfers and their timing can be found in 4.4.8.3 DMA Data Transfer and in the
D
SP56012 Technical Data sheet (DSP56012/D) .
Figure 4-24 HI Initialization–Host Side, DMA Mode
16-bit DMA
Bit 5 = 0
Bit 6 = 1
$0
Reserved; write as 0
Initialize DSP
Initialize HI *
Bit 7 = 1
Optional
INTERRUPT CONTROL REGISTER (ICR)
(read/write)
DMA off
Bit 5 = 1
Bit 6 = 1
Step 2 Of Host Port configuration
2. Option 5: Select DMA mode for
enable
Receive Data Full interrupt
Bit 0 = 1
Bit 1 = 0
enable
Transmit Data Empty interrupt
Bit 0 = 0
Bit 1 = 1
*See Figure 4-26.
24-bit DMA
Bit 5 = 1
Bit 6 = 0
OR
OR
DSP TO HOST
OR
HOST TO DSP
INIT HF1 HF0 TREQ RREQ
70
HM0HM1
65 432 1
AA0332k