Stereo System User Manual

Serial Host Interface
SHI Clock Generator
MOTOROLA DSP56012 User’s Manual 5-5
5.3 SHI CLOCK GENERATOR
The SHI clock generator generates the serial clock to the SHI if the interface operates
in the Master mode. The clock generator is disabled if the interface operates in the
Slave mode. When the SHI operates in the Slave mode, the clock is external and is
input to the SHI (HMST = 0). Figure 5-2 illustrates the internal clock path
connections. It is the user’s responsibility to select the proper clock rate within the
range as defined in the I
2
C and SPI bus specifications.
5.4 SERIAL HOST INTERFACE PROGRAMMING MODEL
The Serial Host Interface programming model is divided in two parts:
Host side—see Figure 5-3 below and Section 5.4.1 on page 5-8
DSP side—see Figure 5-4 on page 5-6 and Sections 5.4.2 on page 5-8
through 5.4.6 on page 5-13 for detailed information
Figure 5-2 SHI Clock Generator
Figure 5-3 SHI Programming Model—Host Side
SHI
HMST
HMST = 0
HMST = 1
SCK/SCL
Divide By
1 or 8
Divide By 1
To
Divide By 64
HRSHDM0–HDM5
SHI Clock
F
OSC
Divide
By 2 Controller
Clock
Logic
CPHA, CPOL, HI
2
C AA0417k
0
I/O Shift Register (IOSR)
IOSR
23
AA0418