Stereo System User Manual

xvi Motorola
Figure 6-11 Transmitter Left/Right Selection (TLRS) Programming . . . . . . .6-19
Figure 6-12 Transmitter Clock Polarity (TCKP) Programming . . . . . . . . . . . .6-20
Figure 6-13 Transmitter Relative Timing (TREL) Programming. . . . . . . . . . .6-20
Figure 6-14 Transmitter Data Word Expansion (TDWE) Programming . . . . .6-21
Figure 7-1 GPIO Control/Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-3
Figure 7-2 GPIO Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-5
Figure 8-1 Digital Audio Transmitter (DAX) Block Diagram . . . . . . . . . . . . . .8-4
Figure 8-2 DAX Programming Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-7
Figure 8-3 DAX Relative Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-11
Figure 8-4 Preamble sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-13
Figure 8-5 Clock Multiplexer Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-13
Figure B-1 On-chip Peripheral Memory Map . . . . . . . . . . . . . . . . . . . . . . . . B-4