Stereo System User Manual

Memory, Operating Modes, and Interrupts

Operating Modes

MOTOROLA DSP56012 User’s Manual 3-13

T states). When the DSP is driven by a stable external clock source, setting the SD bit

before executing the STOP instruction will allow a faster start up of the DSP.

3.5 OPERATING MODES

The DSP56012 operating modes are defined as described below and summarized in

Table 3-3. The operating modes are latched from pins MODA, MODB, and MODC

during reset and can be changed by writing to the OMR.

The operating modes are described in the following paragraphs.

Mode 0 In this mode, the internal Program RAM is enabled and the bootstrap

ROM is disabled. All bootstrap programs end by selecting this

operating mode. This mode is identical to DSP56002 Mode 0.

Note: It is not possible to reach operating Mode 0 during hardware reset. Any

attempt to start up in Mode 0 defaults to Mode 1.

Mode 1 In this mode, the bootstrap ROM is enabled and the bootstrap

program is executed after hardware reset. The internal Program RAM

is loaded with up to 256 words from the parallel Host Interface.

Mode 2 Reserved.

Mode 3 Reserved.

Note: It is not possible to reach operating Mode 3 during hardware reset. Any

attempt to start up in Mode 3 defaults to Mode 1.

Mode 4 In this mode, the bootstrap ROM is enabled and the bootstrap

program is executed after hardware reset. The bootstrap program

Table 3-3 Operating Modes

Mode

MMM

C B A

Operating Mode

0 000 Normal operation, bootstrap disabled

1 001 Bootstrap from parallel Host Interface

2 010 Reserved

3 011 Reserved

4 100 Wake up in Program ROM address $0A00

5 101 Bootstrap from SHI (SPI mode)

6 110 Reserved

7 111

Bootstrap from SHI (I

C mode)