Technical data

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Hardware Preparation and Installation
1
General-Purpose Readable Jumpers Header (J21)
Header J21 provides eight software-readable jumpers. These jumpers can
be read as a register (at address $FFF4202D) in the MC2chip LCSR. Bit 0
is associated with header pins 1-2; bit 7 is associated with pins 15-16. The
bit values are read as a 0 when the jumper is installed, and as a 1 when the
jumper is removed. The MVME172LX is shipped from the factory with
J21 set to all 0s (jumpers on all pins) except for GPI4, as diagrammed
below.
Table 1-5. EPROM/Flash Mapping — 1M x 8 EPROMs
GPI4 Address Range Device Accessed
Removed 1 $FF800000 - $FF8FFFFF EPROM A (XU1)
$FF900000 - $FF9FFFFF EPROM B (XU2)
$FFA00000 - $FFBFFFFF Onboard Flash
Installed 0 $FF800000 - $FF9FFFFF Onboard Flash
$FFA00000 - $FFAFFFFF EPROM A (XU1)
$FFB00000 - $FFBFFFFF EPROM B (XU2)
Table 1-6. EPROM/Flash Mapping — 1M x 8 EPROMs, Onboard Flash
Disabled
GPI4 Address Range Device Accessed
Removed 1 $FF800000 - $FF8FFFFF EPROM A (XU1)
$FF900000 - $FF9FFFFF EPROM B (XU2)
Not used Onboard Flash
Installed 0 Not used Onboard Flash
$FF800000 - $FF8FFFFF EPROM A (XU1)
$FF900000 - $FF9FFFFF EPROM B (XU2)