Technical data

4-2 Computer Group Literature Center Web Site

Functional Description

The MVME172LX is based on the MC68060/MC68LC060

microprocessor. Various versions of the MVME172LX have 4, 8, or

16MB of parity-protected DRAM or 4, 8, 16, 32, or 64MB of ECC-

protected DRAM; 128KB of SRAM (with battery backup); time-of-day

clock (with battery backup); an optional LAN Ethernet transceiver

interface; four serial ports with EIA-232-D interface; six tick timers with

watchdog timer(s); two EPROM sockets; 2MB Flash memory (one Flash

device); two IndustryPack (IP) interfaces with DMA; optional SCSI bus

interface with DMA; and an optional VMEbus interface (local bus to

VMEbus/VMEbus to local bus, with A16/A24/A32, D8/D16/D32 bus

widths and a VMEbus system controller).

Switches Reset (RST) and Abort (ABT)

Status LEDs Four: Board Fail (FAIL), RUN, System Controller (SCON), Fuses (FUSES)

Timers

Four 32-bit tick timers and watchdog timer in MC2chip ASIC

Two 32-bit tick timers and watchdog timer in VMEchip2 ASIC

Interrupts Eight software interrupts (on versions with VMEchip2 ASIC)

VME I/O VMEbus P2 connector

Serial I/O Four EIA-232-D serial ports via RJ45 connectors on front panel

Ethernet I/O Optional Ethernet transceiver interface via DB15 connector on front panel

IP interface Two IndustryPack interface channels via 3M connectors behind front panel

SCSI I/O Optional SCSI interface with DMA via 68-pin front panel connector

VMEbus interface

VMEbus system controller functions

VMEbus-to-local-bus interface (A24/A32, D8/D16/D32/block transfer

[D8/D16/D32/D64])

Local-bus-to-VMEbus interface (A16/A24/A32, D8/D16/D32)

VMEbus interrupter

VMEbus interrupt handler

Global Control/Status Register (GCSR) for interprocessor communications

DMA for fast local memory/VMEbus transfers (A16/A24/A32,

D16/D32/D64)

Table 4-1. MVME172LX Features (Continued)

Feature Description