Technical data

Functional Description
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Most DRAM devices require a certain number of access cycles before the
DRAMs are fully operational. Normally this requirement is met by the
onboard refresh circuitry and normal DRAM initialization. However,
software should insure a minimum of 10 initialization cycles are
performed to each bank of RAM.
SRAM Options
The MVME172LX provides 128KB of 32-bit-wide onboard static RAM
in a single non-interleaved architecture with onboard battery backup. The
SRAM arrays are not parity protected.
The battery backup function for the onboard SRAM and the mezzanine
SRAM is provided by an Electro Marketing EM1275 device (or
equivalent) that supports primary and secondary power sources. In the
event of a main board power failure, the EM1275 checks power sources
and switches to the source with the higher voltage.
If the voltage of the backup source is lower than two volts, the EM1275
blocks the second memory cycle; this allows software to provide an early
warning to avoid data loss. Because the second access may be blocked
during a power failure, software should do at least two accesses before
relying on the data.
The MVME172LX provides jumpers (on J14) that allow either power
source of the EM1275 to be connected to the VMEbus +5V STDBY pin or
to one cell of the onboard battery. For example, the primary system backup
source may be a battery connected to the VMEbus +5V STDBY pin and
the secondary source may be the onboard battery. If the system source
should fail or the board is removed from the chassis, the onboard battery
takes over.
!
Caution
For proper SRAM operation, some jumper combination must
be installed on the Backup Power Source Select header (refer
to the jumper information in Chapter 1). If one of the jumpers
is set to select the battery, a battery must be installed on the
MVME172LX. The SRAM may malfunction if inputs to the
EM1275 are left unconnected.