Technical data

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Functional Description

Watchdog Timer

A watchdog timer is provided in both the MC2chip and the optional

VMEchip2. The timers operate independently but in parallel. When the

watchdog timers are enabled, they must be reset by software within the

programmed time or they will time out. The watchdog timers may be

programmed to generate a SYSRESET signal, local reset signal, or board

fail signal if they time out. Refer to the VMEchip2 and the MC2chip in the

MVME172 VME Embedded Controller Programmer’s Reference Guide

for detailed programming information.

The watchdog timer logic is duplicated in the VMEchip2 and MC2chip

ASICs. Because the watchdog timer function in the VMEchip2 is a

superset of that function in the MC2chip (system reset function), the timer

in the VMEchip2 is used in all cases except for the version of the

MVME172LX which does not include the VMEbus interface ("No

VMEbus Interface" option).

Software-Programmable Hardware Interrupts

Eight software-programmable hardware interrupts are provided by the

VMEchip2. These interrupts allow software to create a hardware interrupt.

Refer to the VMEchip2 in the MVME172 VME Embedded Controller

Programmer’s Reference Guide for detailed programming information.

Local Bus Timeout

The MVME172LX provides timeout functions in the VMEchip2 and the

MC2chip for the local bus. When the timer is enabled and a local bus

access times out, a Transfer Error Acknowledge (TEA) signal is sent to the

local bus master. The timeout value is selectable by software for 8 µsec, 64

µsec, 256 µsec, or infinite. The local bus timer does not operate during

VMEbus bound cycles. VMEbus bound cycles are timed by the VMEbus

access timer and the VMEbus global timer. Refer to the VMEchip2 and the

MC2chip in the MVME172 VME Embedded Controller Programmer’s

Reference Guide for detailed programming information.

The MC2chip also provides local bus timeout logic for MVME172LXs

without the optional VMEbus interface (i.e., without the VMEchip2).