Technical data

Functional Description

http://www.mcg.mot.com/literature 4-15

The access timer logic is duplicated in the VMEchip2 and MC2chip

ASICs. Because the local bus timer in the VMEchip2 can detect an

offboard access and the MC2chip local bus timer cannot, the timer in the

VMEchip2 is used in all cases except for the version of the MVME172LX

which does not include the VMEbus interface ("No VMEbus Interface

option").

Local Bus Arbiter

The local bus arbiter implements a fixed priority (see Table 4-2).

Connectors

The MVME172LX has two 96-position DIN connectors: P1 and P2. P1

rows A, B, C, and P2 row B provide the VMEbus interconnection. P2 rows

A and C are not used.

The MVME172LX has a 20-pin connector J2 mounted behind the front

panel. When the MVME172LX board is enclosed in a chassis and the front

panel is not visible, this connector allows the reset, abort and LED

functions to be extended to the control panel of the system, where they are

visible.

Table 4-2. Local Bus Arbitration Priority

Device Priority Note

LAN 0 Highest

Industry Pack DMA 1

SCSI 2 ...

VMEbus 3 Next Lowest

MC68060/MC68LC060 4 Lowest