International Computer Hardware User Manual

CX-MB-EVA2 User's Manual Hardware
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4.22 OnBoard BIOS-Flash
There is a PLCC32 socket on the mother board, where an additional firmware hub can
be inserted. To boot from this firmware hub, the firmware hub on the COM Express
module has to be disabled with J0203.
4.23 POST-Code Display
For debugging purposes a POST code display is implemented on the base board, thus
enabling the display of BIOS outputs on IO-port 80h and/or Port 90h.
In addition, these signals are output on a pin header. For protocolling purposes a logic
analyser can be connected here.
The pinout of the output connector X44 corresponds to the pinout of the Hewlett Packard
HP-PODs.
Specification:
 References: X44
 Connector: 20-pin header 2.54mm
Pinout: Refer to Table 29
Pin HP-POD Function Pin HP-POD Function
1 +5V not used 2 CLK2 LPC_CLK
3 CLK1 not used 4 D15 not used
5 D14 not used 6 D13 Test signal 3
7 D12 Test signal 2 8 D11 Test signal 1
9 D10 Test signal 0 10 D9 not used
11 D8 Strobe 12 D7 Data 7
13 D6 Data 6 14 D5 Data 5
15 D4 Data 4 16 D3 Data 3
17 D2 Data 2 18 D1 Data 1
19 D0 Data 0 20 GND Ground
Table 29 Pinout POST Display (HP-POD)
4.23.1 Lattice Programming Interface
A connector used to program the PLD to decode the POST codes is implemented. To
reprogram the PLD a Lattice programming adapter is required.
Specification:
 References: X47
 Connector: CAB 714-91-164-31-007 (socket)
 Pinout: Refer to Table 30