Single-Chip Microcontrollers User's Manual

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CHAPTER 21 INTERRUPT AND TEST FUNCTIONS

Table 21-1. Interrupt Source List (2/2)

Interrupt Source

Name Trigger

INTTM3 Reference time interval signal from Internal 001EH (B)

watch timer

INTTM00 Generation of 16-bit timer register, 0020H

capture/compare register (CR00)

match signal

INTTM01 Generation of 16-bit timer register, 0022H

capture/compare register (CR01)

match signal

INTTM1 Generation of 8-bit timer/event 0024H

counter 1 match signal

INTTM2 Generation of 8 bit timer/event 0026H

counter 2 match signal

18 INTAD End of A/D converter conversion 0028H

Software — BRK BRK instruction execution — 003EH (E)

Interrupt

Type

Default

Priority

Internal/

External

Vector

Table

Address

Basic

Configuration

Type

Note 1

Note 2

Notes 1. Default priorities are intended for two or more simultaneously generated maskable interrupts. 0 is the

highest priority and 18 is the lowest priority.

2. Basic configuration types (A) to (E) correspond to (A) to (E) of Figure 21-1.

Maskable