Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Shift register Shift register Push pull DHVQFN 16 (2.5x3.5)

1. General description

The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible

with Low-Power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard

No. 7-A.

The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register

that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct

overriding clears (SHR and STR) are provided on both the shift and storage registers.

A serial output (Q7S) is provided for cascading purposes.

Both the shift and storage register clocks are positive-edge triggered. If the user wishes to

connect both clocks together, the shift register will always be one count pulse ahead of the

storage register.

2. Features

n Balanced propagation delays

n All inputs have Schmitt-trigger actions

n Inputs accept voltages higher than V

n Wide supply voltage range from 2.0 V to 5.5 V

n 8-bit serial-in, parallel-out shift register with storage

n Independent direct overriding clears on shift and storage registers

n Independent clocks for shift and storage registers

n Latch-up performance exceeds 100 mA per JESD78 Class II

n Input levels:

u For 74AHC594: CMOS level

u For 74AHCT594: TTL level

n ESD protection:

u HBM EIA/JESD22-A114E exceeds 2000 V

u MM EIA/JESD22-A115-A exceeds 200 V

u CDM EIA/JESD22-C101C exceeds 1000 V

n Multiple package options

n Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

3. Applications

n Serial-to parallel data conversion

n Remote control holding register

74AHC594; 74AHCT594

8-bit shift register with output register

Rev. 02 — 9 June 2008 Product data sheet

Summary of content (22 pages)

PAGE 1
74AHC594; 74AHCT594 8-bit shift register with output register Rev. 02 — 9 June 2008 Product data sheet 1. General description The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC594D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74AHC594DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register SHCP STCP STR 11 12 STCP Q7S 9 DS Fig 2. SHR R2 12 C2 10 R1 SRG8 11 15 Q0 1 Q1 2 Q2 3 Q3 2 4 Q4 3 5 Q5 4 6 Q6 7 Q7 14 10 13 SHR STR SHCP DS C1/ 14 1D 15 2D 1 5 6 7 9 mbc319 Fig 3.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 6. Pinning information 6.1 Pinning 74AHC594 74AHCT594 Q1 1 16 VCC Q2 2 15 Q0 Q3 3 14 DS Q4 4 13 STR Q5 5 12 STCP Q6 6 11 SHCP Q7 7 10 SHR GND 8 9 Q7S 001aae343 Fig 5.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 6.2 Pin description Table 2.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register SHCP DS STCP SHR STR Q0 Q1 Q6 Q7 Q7S mbc323 Fig 8. Timing diagram 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC VI Conditions Min Max Unit supply voltage −0.5 +7.0 V input voltage −0.5 +7.0 V −20 - mA −20 +20 mA input clamping current VI < −0.
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4AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 9. Recommended operating conditions Table 5. Operating conditions Symbol Parameter Conditions Min Typ Max Unit 74AHC594 VCC supply voltage 2.0 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C ∆t/∆V input transition rise and fall rate VCC = 3.0 V to 3.6 V - - 100 ns/V VCC = 4.5 V to 5.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions VI = 5.5 V or GND; VCC = 0 V to 5.5 V −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max - - 0.1 - 1.0 - 2.0 µA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 15. Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max CL = 15 pF - 5.1 8.3 2.3 9.5 2.3 10.6 ns CL = 50 pF - 7.3 11.9 3.3 13.6 3.3 14.7 ns CL = 15 pF - 3.5 5.7 1.8 6.5 1.8 7.1 ns CL = 50 pF - 4.8 7.8 2.6 9.0 2.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 15. Symbol Parameter tW pulse width 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max VCC = 3.0 V to 3.6 V 6.0 - - 6.5 - 7.0 - ns VCC = 4.5 V to 5.5 V 5.5 - - 6.0 - 6.5 - ns VCC = 3.0 V to 3.6 V 5.0 - - 5.0 - 5.5 - ns VCC = 4.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 15. Symbol Parameter tPHL 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min - 4.1 6.7 - 5.4 8.8 CL = 15 pF - 3.7 CL = 50 pF - CL = 15 pF CL = 50 pF Max Min 1.8 7.6 1.8 8.3 ns 2.4 10.1 2.4 11.0 ns 6.1 1.9 6.9 1.9 7.2 ns 5.2 8.5 2.6 9.7 2.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 12. Waveforms 1/fmax SHCP input VM tW tPLH Q7S output tPHL VM tTLH tTHL 001aae341 Measurement points are given in Table 8. Fig 9. Shift register clock pulse width, maximum frequency and input to output propagation delays SHCP input VM tsu STCP input 1/fmax VM tW tPHL tPLH Qn outputs VM mla512 Measurement points are given in Table 8. Fig 10.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register VM SHCP input t su t su th th VM DS input VM Q7 output 001aae342 Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 11. Shift register clock to data input set-up and hold times STR input VM tW trec VM STCP input tPHL Qn outputs VM mbc325 Measurement points are given in Table 8. Fig 12.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register VM SHR input tW trec VM SHCP input tPHL VM Q7S output mbc324 Measurement points are given in Table 8. Fig 13. Shift register reset pulse width, input to output propagation delay and recovery time VM SHR input tsu VM STCP input VM Qn outputs mbc326 Measurement points are given in Table 8. Fig 14. Shift register reset to storage register clock set-up time Table 8.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register VI negative pulse tW 90 % VM VM 10 % GND tr tf tr VI positive pulse GND tf 90 % VM VM 10 % tW VCC G VI VO DUT RT CL 001aah768 For test data see Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. Fig 15. Load circuitry for measuring switching times Table 9.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b 1 0.05 0.00 0.30 0.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 15. Revision history Table 11.
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74AHC594; 74AHCT594 NXP Semiconductors 8-bit shift register with output register 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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NXP Semiconductors 74AHC594; 74AHCT594 8-bit shift register with output register 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . .