Datasheet
1. General description
The 74CBTLV1G125 provides a single high-speed line switch. The switch is disabled
when the output enable (OE
) input is high.
To ensure the high-impedance OFF-state during power-up or power-down, tie OE
to the
V
CC
through a pull-up resistor. The current-sinking capability of the driver determines the
minimum value of the resistor.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Supply voltage range from 2.3 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
5 switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance meets requirements of JESD78 Class I
I
OFF
circuitry provides partial power-down mode operation
Multiple package options
Specified from 40 Cto+85C and 40 Cto+125C
74CBTLV1G125
Single bus switch
Rev. 4 — 5 September 2012 Product data sheet