74HC4066; 74HCT4066 Quad single-pole single-throw analog switch Rev. 7 — 2 April 2013 Product data sheet 1. General description The 74HC4066; 74HCT4066 is a quad single pole, single throw analog switch. Each switch features two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 3. Ordering information Table 1. Ordering information Type number 74HC4066N Package Temperature range Name Description Version 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch nY nE VCC VCC GND nZ 001aad271 Fig 3. Schematic diagram (one switch) 5. Pinning information 1Y terminal 1 index area 14 VCC 5.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 6. Functional description Table 3. Function table[1] Input nE Switch L OFF H ON [1] H = HIGH voltage level; L = LOW voltage level. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI < 0.5 V or VI > VCC + 0.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage Conditions 74HC4066 74HCT4066 Unit Min Typ Max Min Typ Max 2.0 5.0 10.0 4.5 5.0 5.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch Table 6. RON resistance per switch for types 74HC4066 and 74HCT4066 …continued VI = VIH or VIL; for test circuit see Figure 6. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. For 74HC4066: VCC GND = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4066: VCC GND = 4.5 V.
4HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch Table 7. Static characteristics 74HC4066 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Conditions Min Typ[1] Max Unit VCC = 2.0 V 1.5 1.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch Table 7. Static characteristics 74HC4066 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Min Typ[1] Max Unit VCC = 6.0 V - - 40 A VCC = 10.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch VCC VCC E VIL ISW Yn Vis E VIH Z ISW GND ISW Z Yn Vos Vis Vos GND aaa-003456 Fig 8. aaa-003457 Vis = VCC and Vos = GND Vis = VCC and Vos = open Vis = GND and Vos = VCC Vis = GND and Vos = open Test circuit for measuring OFF-state leakage current Fig 9. Test circuit for measuring ON-state leakage current 10. Dynamic characteristics Table 9.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch [4] toff is the same as tPZH and tPZL. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi + {(CL + Csw) VCC2 fo} where: fi = input frequency in MHz; fo = output frequency in MHz; {(CL + Csw) VCC2 fo} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V. Table 10.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 11. Waveforms 50 % Vis input tPLH tPHL 50 % Vos output 001aad555 Fig 10. Input (Vis) to output (Vos) propagation delays VI VM E input 0V tPLZ tPZL 50 % Vos output 10 % tPHZ tPZH 90 % 50 % Vos output switch ON switch ON switch OFF aaa-003460 Measurement points are shown in Table 11. Fig 11. Turn-on and turn-off times Table 11. Measurement points Type VI 74HC4066 VCC 0.5VCC 74HCT4066 3.0 V 1.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC Vis PULSE GENERATOR VCC Vos VI S1 RL open DUT RT CL GND 001aag732 Test data is given in Table 12. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistor.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 12. Additional dynamic characteristics Table 13. Additional dynamic characteristics Recommended conditions and typical values; GND = 0 V; Tamb = 25 C. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch mna082 0 (dB) −20 −40 −60 −80 −100 10 102 103 104 105 106 fi (kHz) a. Isolation (OFF-state) VCC VCC nE VIL 2RL 0.1 μF nY/nZ nZ/nY fi VO CL 2RL dB 001aaj470 b. Test circuit VCC = 4.5 V; GND = 0 V; RL = 600 ; Rsource = 1 k. Fig 14. Isolation (OFF-state) as a function of frequency 74HC_HCT4066 Product data sheet All information provided in this document is subject to legal disclaimers. Rev.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch mna083 5 (dB) 0 −5 10 102 103 104 105 106 fi (kHz) a. Typical 3 dB frequency response VCC VCC nE VIH 2RL 0.1 μF nY/nZ fi nZ/nY VO 2RL CL dB 001aaj469 b. Test circuit VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k. Fig 15. 3 dB frequency response 74HC_HCT4066 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 2 April 2013 © NXP B.V. 2013.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch VCC nE VCC VCC GND 2RL 2RL nY/nZ nZ/nY DUT 2RL 2RL oscilloscope CL GND mnb011 a. Circuit V(p−p) mnb012 b. Crosstalk voltage Fig 16. Test circuit for measuring crosstalk voltage (between the digital input and the switch) VCC 1E VIH 0.1 μF RL 2RL 1Y or 1Z 1Z or 1Y CHANNEL ON fi 2RL CL V VO1 V VO2 2E VIL VCC VCC 2RL 2RL 2Y or 2Z 2RL 2Z or 2Y CHANNEL OFF 2RL CL 001aai846 Fig 17.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 13. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 14. Abbreviations Table 14. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 15. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT4066 v.7 20130402 Product data sheet - 74HC_HCT4066 v.6 - 74HC_HCT4066 v.
74HC4066; 74HCT4066 NXP Semiconductors Quad single-pole single-throw analog switch 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
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NXP Semiconductors 74HC4066; 74HCT4066 Quad single-pole single-throw analog switch 18. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . .