Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Demultiplexer, decoder Decoder/demultiplexer Single supply TSSOP 16

1. General description

The 74LVC139 is a dual 2-to-4 line decoder/demultiplexer. It has two independent

decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four

mutually exclusive outputs (nY

0tonY3) that are LOW when selected. Each decoder has

an active LOW input (nE

). When nE is HIGH, every output is forced HIGH. The enable

input can be used as the data input for a 1-to-4 demultiplexer application.

2. Features and benefits

 Wide supply voltage range from 1.2 V to 3.6 V

 Inputs accept voltages up to 5.5 V

 CMOS low power consumption

 Direct interface with TTL levels

 Demultiplexing capability

 Two independent 2-to-4 decoders

 Multifunction capability

 Mutually exclusive outputs

 Output drive capability 50  transmission lines at 125 C

 Complies with JEDEC standard:

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A (2.3 V to 2.7 V)

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-B exceeds 200 V

 CDM JESD22-C101E exceeds 1000 V

 Specified from 40 Cto+85C and from 40 C to +125 C

74LVC139

Dual 2-to-4 line decoder/demultiplexer

Rev. 5 — 19 October 2011 Product data sheet

Summary of content (16 pages)

PAGE 1
74LVC139 Dual 2-to-4 line decoder/demultiplexer Rev. 5 — 19 October 2011 Product data sheet 1. General description The 74LVC139 is a dual 2-to-4 line decoder/demultiplexer. It has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive outputs (nY0 to nY3) that are LOW when selected. Each decoder has an active LOW input (nE). When nE is HIGH, every output is forced HIGH.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC139D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74LVC139DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 2 1A0 3 1A1 1 1E 14 2A0 DECODER 1Y0 4 1Y1 5 1Y2 6 1Y3 7 2Y0 12 13 2A1 2Y1 11 DECODER 2Y2 10 9 2Y3 15 2E mna780 Fig 3. Functional diagram 5. Pinning information 1E terminal 1 index area 16 VCC 5.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer Table 2. Pin description …continued Name Pin Description 2Y[0:3] 12, 11, 10, 9 output GND 8 ground (0 V) VCC 16 positive supply voltage 6. Functional description Table 3. Function table[1] Input Output nE nA0 nA1 nY0 nY1 nY2 nY3 H X X H H H H L L L L H H H L H L H L H H L L H H H L H L H H H H H L [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care 7.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage functional Min Typ Max Unit 1.65 - 3.6 V 1.2 - - V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature in free air 40 +125 C t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V 0 - 20 ns/V VCC = 2.7 V to 3.6 V 0 - 10 ns/V 9.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer Table 6. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Typ[1] Min 40 C to +125 C Max Min Unit Max ICC supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A - 0.1 10 - 40 A ICC additional supply current per input pin ; VCC = 2.7 V to 3.6 V; VI = VCC  0.
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4LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer (CL  VCC2  fo) = sum of outputs. 11. Waveforms VI VI VM nAn input GND GND t PHL t PLH tPHL VM VM nYn output VOL VOL mna782 mna783 VM = 1.5 V at VCC  2.7 V. Fig 6. tPLH VOH VOH nYn output VM nE input VM = 1.5 V at VCC  2.7 V. VM = 0.5  VCC at VCC < 2.7 V. VM = 0.5  VCC at VCC < 2.7 V. VOL and VOH are the typical output voltage levels that occur with the output load.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer tW VI 90 % negative pulse VM VM 10 % 0V tf tr tr tf VI 90 % positive pulse VM VM 10 % 0V tW VCC PULSE GENERATOR VI VO DUT RT CL RL 001aaf615 Test data is given in Table 8. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 8. Table 8.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.
PAGE 10
74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 13. Abbreviations Table 9. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC139 v.5 20111019 Product data sheet - 74LVC139 v.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.
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74LVC139 NXP Semiconductors Dual 2-to-4 line decoder/demultiplexer 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . .