Datasheet

1. General description
The 74LVC2G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device.
The 74LVC2G53 provides one analog multiplexer/demultiplexer with a digital select
input (S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an
active LOW enable input (E
). When pin E is HIGH, the switch is turned off.
Schmitt trigger action at the select and enable inputs makes the circuit tolerant of slower
input rise and fall times across the entire V
CC
range from 1.65 V to 5.5 V.
2. Features and benefits
 Wide supply voltage range from 1.65 V to 5.5 V
 Very low ON resistance:
 7.5  (typical) at V
CC
=2.7V
 6.5  (typical) at V
CC
=3.3V
 6  (typical) at V
CC
=5V
 Switch current capability of 32 mA
 High noise immunity
 CMOS low-power consumption
 TTL interface compatibility at 3.3 V
 Latch-up performance meets requirements of JESD 78 Class I
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V
 CDM JESD22-C101E exceeds 1000 V
 Control inputs accept voltages up to 5 V
 Multiple package options
 Specified from 40 C to +85 C and from 40 C to +125 C
74LVC2G53
2-channel analog multiplexer/demultiplexer
Rev. 9 — 5 April 2013 Product data sheet