Datasheet

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1. General description

The 74LVC4066 is a high-speed Si-gate CMOS device.

The 74LVC4066 provides four single pole, single-throw analog switch functions. Each

switch has two input/output terminals (nY and nZ) and an active HIGH enable input (nE).

When nE is LOW, the analog switch is turned off.

Schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise

and fall times across the entire V

range from 1.65 V to 5.5 V.

2. Features and benefits

 Wide supply voltage range from 1.65 V to 5.5 V

 Very low ON resistance:

 7.5  (typical) at V

= 2.7 V

 6.5  (typical) at V

= 3.3 V

 6  (typical) at V

= 5 V

 Switch current capability of 32 mA

 High noise immunity

 CMOS low-power consumption

 Direct interface TTL-levels

 Latch-up performance exceeds 250 mA

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V

 Enable inputs accept voltages up to 5 V

 Multiple package options

 Specified from 40 Cto+85C and 40 Cto+125C

74LVC4066

Quad bilateral switch

Rev. 5 — 23 November 2011 Product data sheet

Summary of content (23 pages)

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74LVC4066 Quad bilateral switch Rev. 5 — 23 November 2011 Product data sheet 1. General description The 74LVC4066 is a high-speed Si-gate CMOS device. The 74LVC4066 provides four single pole, single-throw analog switch functions. Each switch has two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off.
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74LVC4066 NXP Semiconductors Quad bilateral switch 3. Ordering information Table 1. Ordering information Type number 74LVC4066D Package Temperature range Name Description Version 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 TSSOP14 plastic thin small outline package; 14 leads; body width 4.4 mm SOT402-1 DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5  3  0.
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74LVC4066 NXP Semiconductors Quad bilateral switch 5. Pinning information 1Y terminal 1 index area 14 VCC 5.1 Pinning 1 14 VCC 1Z 2 13 1E 1Z 2 13 1E 12 4E 2Z 3 12 4E 2Y 4 4066 11 4Y 2E 5 GND(1) 10 4Z 3E 6 1 1Y 4066 11 4Y 10 4Z 2E 5 3E 6 9 3Z GND 7 8 3Y 9 8 4 3Y 2Y 7 3 GND 2Z 3Z 001aad118 Transparent top view 001aad117 (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material.
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74LVC4066 NXP Semiconductors Quad bilateral switch 6. Functional description Table 3. Function table[1] Input nE Switch L OFF H ON [1] H = HIGH voltage level; L = LOW voltage level. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage IIK input clamping current Conditions [1] VI < 0.5 V or VI < VCC + 0.
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74LVC4066 NXP Semiconductors Quad bilateral switch 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage VI input voltage [1] VSW switch voltage Tamb ambient temperature t/V input transition rise and fall rate Min Typ Max Unit 1.65 - 5.5 V 0 - 5.5 V 0 - VCC V 40 - +125 C VCC = 1.65 V to 2.7 V [2] - - 20 ns/V VCC = 2.7 V to 5.
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74LVC4066 NXP Semiconductors Quad bilateral switch Table 6. Static characteristics …continued At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max CI input capacitance - 12.5 - - - pF CS(OFF) OFF-state capacitance - 8.0 - - - pF CS(ON) ON-state capacitance - 14.0 - - - pF [1] All typical values are measured at Tamb = 25 C.
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4LVC4066 NXP Semiconductors Quad bilateral switch Table 7. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 9 to Figure 14. Symbol RON(rail) Parameter ON resistance (rail) 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max ISW = 4 mA; VCC = 1.65 V to 1.95 V - 8.2 18 - 27  ISW = 8 mA; VCC = 2.3 V to 2.7 V - 7.1 16 - 24  ISW = 12 mA; VCC = 2.7 V - 6.
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74LVC4066 NXP Semiconductors Quad bilateral switch 9.3 ON resistance test circuit and graphs mna673 40 RON (Ω) 30 VSW (1) 20 VCC nE VIH (2) (3) nY 10 nZ (4) GND VI (5) ISW 0 0 1 2 3 4 5 VI (V) 001aag490 RON = VSW / ISW. (1) VCC = 1.8 V. (2) VCC = 2.5 V. (3) VCC = 2.7 V. (4) VCC = 3.3 V. (5) VCC = 5.0 V. Fig 8. Test circuit for measuring ON resistance 001aaa712 55 RON (Ω) Fig 9.
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74LVC4066 NXP Semiconductors Quad bilateral switch 001aaa709 13 001aaa710 10 RON (Ω) RON (Ω) 11 8 (1) (1) 9 (2) (2) 6 (3) (3) 7 (4) (4) 5 4 0 0.5 1.0 1.5 2.0 2.5 3.0 VI (V) 0 1 2 3 4 VI (V) (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 12. ON resistance as a function of input voltage; VCC = 2.7 V Fig 13. ON resistance as a function of input voltage; VCC = 3.
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74LVC4066 NXP Semiconductors Quad bilateral switch 10. Dynamic characteristics Table 8. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit Figure 17. Symbol Parameter 40 C to +85 C Conditions Min Max Min Max VCC = 1.65 V to 1.95 V - 0.8 2.0 - 3.0 ns VCC = 2.3 V to 2.7 V - 0.4 1.2 - 2.0 ns VCC = 2.7 V - 0.4 1.0 - 1.5 ns VCC = 3.0 V to 3.6 V - 0.3 0.8 - 1.5 ns - 0.2 0.6 - 1.
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74LVC4066 NXP Semiconductors Quad bilateral switch 10.1 Waveforms and test circuit VI nY or nZ input VM VM GND t PLH t PHL VOH nZ or nY output VM VM VOL 001aaa541 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 15.
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74LVC4066 NXP Semiconductors Quad bilateral switch VEXT VCC VI RL VO G DUT RT RL CL mna616 Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. VEXT = External voltage for measuring switching times. Fig 17. Load circuit for switching times Table 10.
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74LVC4066 NXP Semiconductors Quad bilateral switch Table 11. Additional dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter Conditions f(-3dB) -3 dB frequency response RL = 600 ; CL = 50 pF; see Figure 19 Min Typ Max Unit VCC = 1.65 V - 170 - MHz VCC = 2.3 V - 210 - MHz VCC = 3 V - 212 - MHz VCC = 4.5 V - 215 - MHz VCC = 1.65 V - > 500 - MHz VCC = 2.
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74LVC4066 NXP Semiconductors Quad bilateral switch Table 11. Additional dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter Conditions Min Typ Max Unit Qinj charge injection CL = 0.1 nF; Vgen = 0 V; Rgen = 0 ; fi = 1 MHz; RL = 1 M; see Figure 23 VCC = 1.8 V - 3.3 - pC VCC = 2.5 V - 4.1 - pC VCC = 3.3 V - 5.0 - pC VCC = 4.5 V - 6.4 - pC VCC = 5.5 V - 7.5 - pC 10.2.
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74LVC4066 NXP Semiconductors Quad bilateral switch 0.5VCC VCC RL VIL 0.1 μF 0.5VCC nE RL nY/nZ nZ/nY VO 50 Ω fi CL dB 001aag493 Adjust fi voltage to obtain 0 dBm level at input. Fig 20. Test circuit for measuring isolation (OFF-state) VCC nE nY/nZ G logic input 50 Ω nZ/nY 600 Ω VO RL 0.5VCC CL 0.5VCC 001aag494 Fig 21. Test circuit for measuring crosstalk voltage (between digital inputs and switch) 0.5VCC 1E VIH 0.
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74LVC4066 NXP Semiconductors Quad bilateral switch VCC nE Rgen G logic input nY/nZ nZ/nY VO RL 1 MΩ Vgen CL 0.1 nF 001aag495 logic input (nE) off on off ΔVO VO mna675 Qinj = VO  CL. VO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 23. Test circuit for measuring charge injection 74LVC4066 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 November 2011 © NXP B.V. 2011.
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74LVC4066 NXP Semiconductors Quad bilateral switch 11. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.
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74LVC4066 NXP Semiconductors Quad bilateral switch TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.
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74LVC4066 NXP Semiconductors Quad bilateral switch DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 3.1 2.9 1.
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74LVC4066 NXP Semiconductors Quad bilateral switch 12. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test 13. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC4066 v.5 20111123 Product data sheet - 74LVC4066 v.
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74LVC4066 NXP Semiconductors Quad bilateral switch 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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74LVC4066 NXP Semiconductors Quad bilateral switch Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.
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74LVC4066 NXP Semiconductors Quad bilateral switch 16. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 9.1 9.2 9.3 10 10.1 10.2 10.2.1 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . .