Datasheet

ManualsBrandsNXP SEMICONDUCTORS ManualsLogic ICsLogic IC - Flip-Flop Standard Three-state, Non-inverting SSOP 20

1. General description

The 74LVC574A is an octal D-type flip-flop featuring separate D-type inputs for each

flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an Output

Enable (OE

) input are common to all flip-flops.

The eight flip-flops will store the state of their individual D-inputs that meet the set-up and

hold times requirements on the LOW to HIGH CP transition.

When OE

is LOW, the contents of the eight flip-flops are available at the outputs. When

is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input

does not affect the state of the flip-flops.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices as translators in

mixed 3.3 V or 5 V applications.

The 74LVC574A is functionally identical to the 74LVC374A, but has a different pin

arrangement.

2. Features and benefits

 5 V tolerant inputs for interfacing with 5 V logic

 Supply voltage range from 1.2 V to 3.6 V

 CMOS low power consumption

 Direct interface with TTL levels

 High-impedance when V

= 0 V

 8-bit positive edge-triggered register

 Independent register and 3-state buffer operation

 Flow-through pin-out architecture

 Complies with JEDEC standard:

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A (2.3 V to 2.7 V)

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-B exceeds 200 V

 CDM JESD22-C101E exceeds 1000 V

 Specified from 40 C to +85 C and 40 C to +125 C

74LVC574A

Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive

edge-trigger; 3-state

Rev. 5 — 18 December 2012 Product data sheet

Summary of content (19 pages)

PAGE 1
74LVC574A Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state Rev. 5 — 18 December 2012 Product data sheet 1. General description The 74LVC574A is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an Output Enable (OE) input are common to all flip-flops.
PAGE 2
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC574AD 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74LVC574ADB 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads; body width 5.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 2 D0 Q0 19 3 D1 Q1 18 4 D2 5 D3 6 D4 7 D5 Q5 14 8 D6 Q6 13 9 D7 Q7 12 Q2 17 FF1 to FF8 Q3 16 3-STATE OUTPUTS Q4 15 11 CP 1 OE mna800 Fig 3. Functional diagram D0 D1 D Q D2 D Q D CP CP FF1 D3 Q D CP FF2 D4 Q D CP FF3 D5 Q D CP FF4 Q D CP FF5 D7 D6 Q D CP FF6 Q CP FF7 FF8 CP OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mna801 Fig 4.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 5. Pinning information 5.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 6. Functional description Table 3.
PAGE 6
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage VI input voltage VO output voltage Min Typ Max Unit 1.65 - 3.6 V functional 1.2 - - V 0 - 5.5 V output HIGH or LOW state 0 - VCC V output 3-state 0 - 5.
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4LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state Table 6. Static characteristics …continued At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions 40 C to +125 C Min Typ[1] Max Min Max Unit IOZ OFF-state output current VI = VIH or VIL; VCC = 3.6 V; VO = 5.5 V or GND; - 0.1 10 - 20 A IOFF power-off leakage supply VCC = 0 V; VI or VO = 5.5 V - 0.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10. Symbol Parameter tW pulse width set-up time tsu hold time th maximum frequency fmax 40 C to +85 C Conditions output skew time Max Min Max VCC = 1.65 V to 1.95 V 5.0 - - 5.0 - ns VCC = 2.3 V to 2.7 V 4.0 - - 4.0 - ns VCC = 2.7 V 3.3 - - 3.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 11. AC waveforms 1/fmax VI CP input VM GND tW t PHL t PLH VOH VM Qn output VOL mna802 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state VI OE input VM GND t PLZ t PZL VCC Qn output LOW-to-OFF OFF-to-LOW VM VX VOL t PZH t PHZ VOH VY Qn output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs enable outputs disabled mna80 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 9. Table 8.
PAGE 11
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
PAGE 12
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 12. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 10 1 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.
PAGE 13
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.
PAGE 14
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC574A v.5 20121218 Product data sheet - 74LVC574A v.
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74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
PAGE 18
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use.
PAGE 19
74LVC574A NXP Semiconductors Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . .