Datasheet

ADC1015S_SER All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 20 December 2010 30 of 42
NXP Semiconductors
ADC1015S series
Single 10-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
Fig 29. Default mode at start-up: SCLK LOW = offset binary; SDIO HIGH = LVDS DDR
Fig 30. Default mode at start-up: SCLK HIGH = two’s complement; SDIO LOW = CMOS
CS
SDIO
(CMOS LVDS DDR)
SCLK
(Data format)
Offset binary, LVDS DDR
default mode at start-up
005aaa063
SDIO
(CMOS LVDS DDR)
SCLK
(Data format)
two's complement, CMOS
default mode at start-up
005aaa064
CS