Datasheet

L
F
P
A
K
5
6
D
BUK9K89-100E
Dual N-channel TrenchMOS logic level FET
23 April 2013 Product data sheet
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1. General description
Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS
technology. This product has been designed and qualified to AEC Q101 standard for use
in high performance automotive applications.
2. Features and benefits
•
Q101 compliant
•
Repetitive avalanche rated
•
Suitable for thermally demanding environments due to 175 °C rating
•
True logic level gate with V
GS(th)
> 0.5 V @ 175 °C
3. Applications
•
12 V Automotive systems
•
Motors, lamps and solenoid control
•
Start-stop micro-hybrid applications
•
Transmission control
•
Ultra high performance power switching
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
drain-source voltage T
j
≥ 25 °C; T
j
≤ 175 °C - - 100 V
I
D
drain current V
GS
= 5 V; T
mb
= 25 °C; Fig. 1 - - 12.5 A
P
tot
total power dissipation T
mb
= 25 °C; Fig. 2 - - 38 W
Static characteristics FET1 and FET2
R
DSon
drain-source on-state
resistance
V
GS
= 5 V; I
D
= 5 A; T
j
= 25 °C; Fig. 12 - 75.8 89 mΩ
Dynamic characteristics FET1 and FET2
Q
GD
gate-drain charge I
D
= 5 A; V
DS
= 80 V; V
GS
= 10 V;
T
j
= 25 °C; Fig. 14; Fig. 15
- 4.2 - nC