Datasheet

56F807 Technical Data Technical Data, Rev. 16
42 Freescale Semiconductor
3.9 Quadrature Decoder Timing
Figure 3-24 Quadrature Decoder Timing
Table 3-14 Quadrature Decoder Timing
1, 2
Operating Conditions: V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6 V, T
A
= –40° to +85°C, C
L
≤ 50pF, f
OP
= 80MHz
1. In the formulas listed, T = the clock cycle. For 80MHz operation, T=12.5ns. V
SS
= 0V, V
DD
= 3.0–3.6V,
T
A
= –40° to +85°C, C
L
≤ 50pF.
2. Parameters listed are guaranteed by design.
Characteristic Symbol Min Max Unit
Quadrature input period P
IN
8T + 12 — ns
Quadrature input high/low period P
HL
4T + 6 — ns
Quadrature phase period P
PH
2T + 3 — ns
Phase B
(Input)
P
IN
P
HL
P
HL
Phase A
(Input)
P
IN
P
HL
P
HL
P
PH
P
PH
P
PH
P
PH