Freescale Semiconductor Data Sheet:Technical Data Document Number: MPL3115A2 Rev 3.0, 12/2013 An Energy Efficient Solution by Freescale Xtrinsic MPL3115A2 I2C Precision Altimeter MPL3115A2 50 to 110 kPa The Xtrinsic MPL3115A2 employs a MEMS pressure sensor with an I2C interface to provide accurate Pressure/Altitude and Temperature data. The sensor outputs are digitized by a high resolution 24-bit ADC. Internal processing removes compensation tasks from the host MCU system.
Contents 1 2 3 4 5 6 7 8 9 Block Diagram and Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Mechanical and Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Mechanical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1 Block Diagram and Pin Descriptions Reference Reference + + Regulator Regulator VVdd DD VDDIO VddIO CAP CAP SDA SDA SCL SCL Pressure Sensor Sense Amp MUX ADC Digital Signal Processing and Control Temp INT1 INT1 INT2 INT2 Clock oscillator Trim Logic Clock Oscillator Trim Logic Figure 1. Block Diagram Table 1. Pin Descriptions Pin Name Function 1 VDD VDD Power Supply Connection (1.95-3.6 V) 2 CAP External Capacitor 3 GND Ground 4 VDDIO Digital Interface Power Supply (1.62-3.
VDD Vdd 100nF 10μF SCL 1 8 2 7 3 6 4 5 SDA 100nF VDDIO VddIO INT1 INT2 Figure 2. Pin Connections The device power is supplied through the VDD line. Power supply decoupling capacitors (100 nF ceramic plus 10 μF bulk or 10 μF ceramic) should be placed as near as possible to pin 1 of the device. A second 100 nF capacitor is used to bypass the internal regulator. The functions, threshold and the timing of the interrupt pins (INT1 and INT2) are user programmable through the I2C interface.
2 Mechanical and Electrical Specifications 2.1 Mechanical Characteristics Table 2. Mechanical Characteristics @ VDD = 2.5 V, T = 25 °C unless otherwise noted(1) Ref Symbol Parameter Test Conditions Min Calibrated Range Operational Range Typ Max Unit 50 110 kPa 20 110 kPa Pressure Sensor 1 PFS Measurement Range 1x Oversample(2) 2 Pressure Reading Noise 128x Oversample (2) 50 to 110 kPa over 0 °C to 50 °C 3 19 Pa RMS 1.5 Pa RMS -0.4 0.
3 Electrical Characteristics Table 3. Electrical Characteristics @ VDD = 2.5 V, T = 25 °C unless otherwise noted. Ref Symbol 1 VDDIO 2 VDD Parameter Min Typ Max Unit I/O Supply Voltage 1.62 1.8 3.6 V Operating Supply Voltage 1.95 2.5 3.6 V 3 4 IDD Integrated Current 1 update per second 5 I Max Current during Acquisition and Conversion 6 IDDMAX 7 IDDSTBY Supply Current Drain in STANDBY Mode Test Conditions Highest Speed Mode Oversample = 1 8.
I2C Interface Characteristics 3.1 Table 4. I2C Slave Timing Values(1) Ref Symbol I 2C Parameter Unit Condition Min Max 1 fSCL SCL Clock Frequency Pull-up = 1 kΩ, Cb = 400 pF 0 400 KHz 2 fSCL SCL Clock Frequency Pull-up = 1 kΩ, Cb = 20 pF 0 4 MHz 3 tBUF Bus free time between STOP and START condition 1.3 µs 4 tHD;STA Repeated START Hold Time 0.6 µs 5 tSU;STA Repeated START Setup Time 0.6 µs 6 tSU;STO STOP Condition Setup Time 0.
MSB SCL SDA 1 LSB 2 3 4 5 6 7 Calling Address Read/ Write MSB SDA Start Signal MSB 9 AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W Start Signal SCL 8 1 XXX 3 4 5 6 7 8 Read/ Write 3 4 5 6 7 8 D7 D6 D5 D4 D3 D2 D1 D0 Data Byte 1 XX Ack Bit 9 No Ack Bit MSB 9 AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W Calling Address 2 Ack Bit LSB 2 LSB 1 Stop Signal LSB 2 3 4 5 6 7 8 9 AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W Repeated Start Signal New Calling Address Read/ Write No Stop Ack
3.2 Absolute Maximum Ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 5. Maximum Ratings Characteristic Symbol Value Unit Maximum Applied Pressure Pmax 500 kPa Supply Voltage VDD -0.3 to 3.6 V VDDIO -0.3 to 3.
4 Quick Start Setup To set up the part in Altimeter mode, you may select your data retrieval method between polling (no FIFO), interrupt (no FIFO) or with the FIFO. The flow chart in Figure 5 describes the setup for polling or interrupt with an OSR of 128. Figure 6 describes the FIFO setup with an OSR of 128. See the application note titled Data Manipulation and Basic Settings of the MPL3115A2 Command Line Interface (document AN4519).
/* I2C Address is 0xC0 */ SlaveAddressIIC = 0xC0 /* Set INT to Active Low Open Drain */ IIC _RegWrite(SlaveAddressIIC, 0x28, 0x11); /* Set to Altimeter with an OSR = 128 */ IIC_RegWrite(SlaveAddressIIC, 0x26, 0xB8); /* Enable FIFO Interrupt */ IIC _RegWrite(SlaveAddressIIC, 0x29, 0x40); /* Enable Data Flags in PT_DATA_CFG */ IIC_RegWrite(SlaveAddressIIC, 0x13, 0x07); /* Set Active */ IIC_RegWrite(SlaveAddressIIC, 0x26, 0xB9); /* Set INT to Active Low Open Drain */ IIC_RegWrite(SlaveAddressIIC, 0x28, 0x11)
5 Terminology 5.1 Resolution The resolution of a pressure sensor is the minimum change of pressure that can be reliably measured. The usable resolution of the MPL3115A2 is programmable, enabling the user to choose a compromise between acquisition speed, power consumption, and resolution that best fits the application. To simplify the programming, the data is always reported in the same format with differing number of usable bits. 5.2 Accuracy 5.2.
5.4 Power Modes of Operation SLEEP ACTIVE OFF STANDBY WAKE Figure 7. Mode Transition Diagram 5.4.1 Off Unit is powered down and has no operating functionality. VDD and VDDIO are not powered. 5.4.2 STANDBY The digital sections are operational and the unit is capable of receiving commands and delivering stored data. The analog sections are off. The part is waiting for CTRL_REG1 to be configured and the part to enter active mode. 5.4.3 ACTIVE Both analog and digital sections are running.
6.1 Factory Calibration The device is factory calibrated for sensitivity, offset for both Temperature and Pressure measurements. Trim values are stored, on-chip, in Non-Volatile Memory (NVM). In normal use, further calibration is not necessary; however, in order to realize the highest possible accuracy, the device allows the user to override the factory set offset values after power-up. The user adjustments are stored in volatile registers.
6.6.3 Reach Target Threshold Temperature (SRC_TTH) Interrupt flag is set on reaching the value stored in the Temperature target register. Additionally a window value provides ability to signal when the target is nearing from either above or below the value in the Temperature target register. Note: When the window value is set to 0 then the interrupt will only be generated when reaching or crossing the target value. 6.6.
The number of bytes per transfer is unlimited. If the master can't receive another complete byte of data until it has performed some other function, it can hold the clock line, SCL low to force the transmitter into a wait state. Data transfer only continues when the master is ready for another byte and releases the clock line. A low to high transition on the SDA line while the SCL line is high is defined as a stop condition (STOP). A data transfer is always terminated by a STOP.
7 Register Descriptions Table 9.
Table 9. Register Address Map 1. 2. 3. 4.
Table 10. Register Address Map with FIFO Modes(1) Reset Register Address Reset when Type Value STANDBY Name Auto-Increment Address Comment to ACTIVE Registers: Area A (F_Mode = 0, FIFO disabled) 0x00/ 0x06 Sensor Status Register (DR_STATUS) 0x00 Yes R 0x01 0x02 0x01 DR_STATUS Bits 12-19 of 20-bit real-time Pressure sample. Root pointer to Pressure and Temperature FIFO data.
7.1.2.1 Data Registers with F_MODE = 00 (FIFO Disabled) When the FIFO subsystem data output register driver is disabled (F_MODE = 00), the register indicates the real-time status information of the sample data. Table 12. DR_STATUS Register R 7 6 5 4 3 2 1 0 PTOW POW TOW 0 PTDR PDR TDR 0 0 0 0 0 0 0 0 0 W Reset Table 13. DR_STATUS Bit Descriptions Name Description PTOW Pressure/Altitude OR Temperature data overwrite.
7.1.3 OUT_P_MSB (0x01), OUT_P_CSB (0x02), OUT_P_LSB (0x03), OUT_T_MSB (0x04), OUT_T_LSB (0x05) The Altitude data is stored as a signed fractional 20-bit value in meters in Q16.4 format. The OUT_P_MSB and OUT_P_CSB registers contain the integer part in meters and the OUT_P_LSB register contains the fractional part.
7.1.4 OUT_P_DELTA_MSB (0x07), OUT_P_DELTA_CSB (0x08), OUT_P_DELTA_LSB (0x09), OUT_T_ DELTA_MSB (0x0A), OUT_T_DELTA_LSB (0x0B) Differences from last Pressure/Altitude and Temperature samples. The Altitude data is arranged as 20-bit 2’s complement value in meters. Stored as meters with the 16 bits of OUT_P_DELTA_MSB and OUT_P_DELTA_CSB and with fractions of a meter stored in 4 bits in position 7-4 of OUT_P_DELTA_LSB. The Pressure is arranged as 20-bit 2’s complement value in Pascals.
7.2 Device ID 7.2.1 WHO_AM_I (0x0C) Device identification register. This register contains the device identifier which is set to 0xC4 by default. The value is factory programmed. Consult factory for custom alternate values. Table 24. WHO_AM_I Register 7 6 5 4 R 3 2 1 0 WHO_AM_I W Reset (NVM data) (NVM data) (NVM data) (NVM data) (NVM data) (NVM data) (NVM data) (NVM data) 1 1 0 0 0 1 0 0 7.3 FIFO Setup 7.3.
7.3.2 F_DATA (0x0E) F_DATA is a read only address which provides access to 8-bit FIFO data. FIFO holds a maximum of 32 samples; a maximum of 5 x 32 = 160 data bytes of samples can be read. When F_MODE bit in FIFO SETUP (F_SETUP) register is set to logic “1”, the F_DATA pointer shares the same address location as OUT_P_MSB (0x01); therefore all accesses of the FIFO buffer data use the I2C address 0x01. Reads from the other data registers (0x02, 0x03, 0x04, 0x05) will return a value of 0x00.
Table 31. F_SETUP Bit Descriptions FIFO Event Sample Count Watermark. Default value: 00_0000. These bits set the number of FIFO samples required to trigger a watermark interrupt. A FIFO watermark event flag (F_WMRK_FLAG) is raised when FIFO sample count F_CNT[5:0] value is equal to the F_ WMRK[5:0] watermark. Setting the F_WMRK[5:0] to 00_0000 will disable the FIFO watermark event flag generation. F_WMRK[5:0](2) 1. This bit field can be written in ACTIVE mode. 2.
Table 36. INT_SOURCE Bit Descriptions Name Description SRC_DRDY Data ready interrupt status bit. Logic ‘1’ indicates that Pressure/Altitude or Temperature data ready interrupt is active indicating the presence of new data and/or a data overwrite, otherwise it is a logic ‘0’. This bit is asserted when the PTOW and/or PTDR is set and the functional block interrupt has been enabled. This bit is cleared by reading the STATUS and Pressure/Temperature register. SRC_FIFO FIFO interrupt status bit.
7.8 Barometric Pressure Input 7.8.1 BAR_IN_MSB, BAR_IN_LSB (0x14, 0x15) Barometric input for altitude calculations. Input is equivalent sea level pressure for measurement location. Value is input in 2 Pa units. Units are input as unsigned 16-bit integers. The default value is 101,326 Pa. The default value can be changed by writing to this register Table 39.
7.11 Pressure/Altitude Window 7.11.1 P_WND_MSB, P_WND_LSB (0x19, 0x1A) Pressure/Altitude window value. Unsigned 16-bit value of window value in meters or in 2 Pa units Table 44. P_WND_LSB Register R W Reset 7 6 5 4 3 2 1 0 P_W15 P_W 14 P_W 13 P_W 12 P_W 11 P_W 10 P_W 9 P_W 8 0 0 0 0 0 0 0 0 Table 45. P_WND_MSB Description R W Reset 7.12 7 6 5 4 3 2 1 0 P_W7 P_W 6 P_W 5 P_W 4 P_W 3 P_W 2 P_W 1 P_W 0 0 0 0 0 0 0 0 0 Temperature Window 7.12.
7.14 Maximum Pressure 7.14.1 P_MAX_MSB, P_MAX_CSB, P_MAX_LSB (0x21, 0x22, 0x23) Register with captured maximum Pressure/Altitude value. The Altitude data is arranged as 20-bit 2’s complement value in meters. Stored as meters with the 16 bits of P_MAX_MSB and P_MAX_CSB and with fractions of a meter stored in 4 bits in position 7-4 of P_MAX_LSB. The Pressure is arranged as 20-bit unsigned data in Pascals. The first 18 bits are located in P_MAX_MSB, P_MAX_CSB and bits 7-6 of P_MAX_LSB.
7.16 Maximum Temperature 7.16.1 T_MAX_MSB, T_MAX_LSB (0x24, 0x25) Register with captured maximum temperature value. The Temperature data is arranged as 12-bit 2’s complement value in degrees C. The 8 bits of T_MAX_MSB representing degrees and with fractions of a degree stored in 4 bits in position 7-4 of T_MAX_LSB. The register is cleared on power-up or manually by writing 0 to the registers Table 55.
Table 58. CTRL_REG1 Bit Descriptions OS[2:0] Oversample Ratio. These bits select the oversampling ratio. Value is 2OS. The default value is 000 for a ratio of 1. RAW RAW output mode. RAW bit will output ADC data with no post processing, except for oversampling. No scaling or offsets will be applied in the digital domain. The FIFO must be disabled and all other functionality: Alarms, Deltas, and other interrupts are disabled. ALT Altimeter-Barometer mode.
7.17.3 CTRL_REG3 (Interrupt CTRL Register) (0x28) Table 62. CTRL_REG3 Register 7 R 6 5 0 W Reset 0 0 4 IPOL1 PP_OD1 0 0 3 2 0 0 1 0 IPOL2 PP_OD2 0 0 0 Table 63. CTRL_REG3 Description Name Description IPOL1 The IPOL bit selects the polarity of the interrupt signal. When IPOL is ‘0’ (default value) any interrupt event will signalled with a logical ‘0'. Interrupt Polarity active high, or active low on interrupt pad INT1.
Table 65. Interrupt Enable Register Description INT_EN_TW Interrupt Enable. Default value: 0 0: Temperature window interrupt disabled 1: Temperature window interrupt enabled. INT_EN_PTH Interrupt Enable. Default value: 0 0: Pressure Threshold interrupt disabled 1: Pressure Threshold interrupt enabled. INT_EN_TTH Interrupt Enable. Default value: 0 0: Temperature Threshold interrupt disabled 1: Temperature Threshold interrupt enabled. INT_EN_PCHG Interrupt Enable.
7.17.5 CTRL_REG5 [Interrupt Configuration Register] (0x2A) Table 66. CTRL_REG5 Register 7 R W 6 INT_CFG_DRDY Reset 5 4 3 2 1 0 INT_CFG_FIFO INT_CFG_PW INT_CFG_TW INT_CFG_PTH INT_CFG_TTH INT_CFG_PCHG INT_CFG_TCHG 0 0 0 0 0 0 0 0 Table 67. Interrupt Configuration Register Descriptions Interrupt Configuration Description INT_CFG_DRDY INT1/INT2 Configuration. Default value: 0 0: Interrupt is routed to INT2 pin; 1: Interrupt is routed to INT1 INT_CFG_FIFO INT1/INT2 Configuration.
The system’s interrupt controller uses the corresponding bit field in the CTRL_REG5 register to determine the routing table for the INT1 and INT2 interrupt pins. If the bit value is logic ‘0’ the functional block’s interrupt is routed to INT2, and if the bit value is logic ‘1’ then the interrupt is routed to INT1.
Table 71. OFF_Y Description Name Description OFF_T7-OFF_T0 Temperature offset trim value. Default value: 0000_0000. 7.18.3 OFF_H (0x2D) Altitude Data User Offset Register (OFF_H) is expressed as a 2’s complement number in meters. The user offset register provides user adjustment to the vertical height of the Altitude output. The range of values are from -128 to +127 meters. Table 72.
8 Soldering/Landing Pad Information The LGA package is compliant with the RoHS standard. Note that Pin 1 index area marker does not have any internal electrical connections. Handling and soldering recommendations for pressure sensors are available in application note AN3150. Figure 10. MPL3115A2 Recommended PCB Landing Pattern. MPL3115A2 Sensors Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS CASE 2053-01 ISSUE O LGA PACKAGE MPL3115A2 38 Sensors Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS CASE 2053-01 ISSUE O LGA PACKAGE MPL3115A2 Sensors Freescale Semiconductor, Inc.
9 Tape and Reel Specifications (I) Ao 3.35 ± 0.10 Bo 5.35 ± 0.10 Ko 1.20 ± 0.10 F 5.50 ± 0.10 P1 8.00 ± 0.10 W 12.00 ± 0.10 Measured from centerline of sprocket hole to centerline of pocket. (II) Cumulative tolerance of 10 sprocket holes is ±0.20. (III) Measured from centerline of sprocket hole to centerline of pocket. (IV) Other material available. Dimensions are in millimeters. Figure 11. LGA (3 by 5) Embossed Carrier Tape Dimensions Pin 1 Index Area Figure 12.
Table 74. Revision History Revision number Revision date 0 06/2011 1 12/2011 Description of changes • Initial Release • • • • • • • • • Added bullet and new row under Ordering Information on pg 1. Global change to register names 0x16, 0x17, 0x18, 0x19, 0x1A; changed ARM to TGT. Global change to bit names in registers 0x12 and 0x2A. Section 2.1, Table 1, changed Min and Max values for Pressure Absolute Accuracy. Table 3 changed units to ns for SDA Data Hold Time Added Figure 4.
How to Reach Us: Information in this document is provided solely to enable system and software Home Page: www.freescale.com implementers to use Freescale products. There are no express or implied copyright Web Support: http://www.freescale.com/support information in this document. licenses granted hereunder to design or fabricate any integrated circuits based on the Freescale reserves the right to make changes without further notice to any products herein.
